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Tue, 26 Jan 2016 01:04:07 -0800 (PST) | |
Date: | Tue, 26 Jan 2016 10:04:02 +0100 |
From: | "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> |
To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] Hierarchical design, pin number not needed |
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> >>>>> Then using hierarchical design netlist complain if there are no pin numbers in symbol although in pcb it seems everything work OK without the pin numbers. > >>>> > >>>> It doesn’t work OK if you’re not flattening hierarchy. > >>> > >>> The number is in the symbol but not in the schematic underneath. How is the number used? Or what purpose does it fulfill? > >> > >> There’s no way get get pin attributes or connections without the pin number in the back end. The hierarchy traversal in the core can “cheat” because it completely removes the pin from the netlist structures. A hierarchical back end needs the pin, though, and therefore needs the pin number. > > > > So if hierarchical back end needs the pin how does it use it then there is only refdes and no pin number on sub sheet? Would it possible to add an enumerator in between instead? > > It depends on the back end. The older SPICE back ends relate the numeric part of a spice-IO device’s refdes to a pinseq attribute on the subcircuit symbol. My gnet-spice-noqsi imitates the gnetlist core behavior, relating the refdes on an io symbol to the a pinlabel on the subcircuit symbol. I don’t know what other hierarchy-aware back ends do. Since gnetlist and your gnet-spice-noqsi relate the refdes on an io symbol to the pinlabel there should be no need for pinnumber then using these backends since the number is not used. Nicklas Karlsson
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