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Subject:	Re: [geda-user] Primitive electrical types --> layers
From:	"Chris Smith (space DOT dandy AT icloud DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Date:	Mon, 11 Jan 2016 11:43:05 +0000
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> On 11 Jan 2016, at 11:05, Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
> 
> This is why all the more advanced board representation formats model an explicit outline, with poly(curve) type primitives, so an explicit design intent of the finished shape can be modelled. This is effectively a "polygon" shape in PCB, especially once the patches adding support for curved edges are merged. To avoid ambiguity in interpretation, this "polygon" needs (I believe) to be a first-class property of the stack-up model. (Something I'm working on designing and adding currently).


Out of curiosity, why bother with any other types of drawing primitive than polygons made up of bezier curves?  Surely at the scale we’re talking about (nanometers) even traces are just polygons with predominantly parallel edges.  Wouldn’t it simplify the library functions if we just had to handle interactions between polygons, and make things like trace endings (rounded, square, teardrop) easier?

Chris
—
Chris Smith <space DOT dandy AT icloud DOT com>

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