Mail Archives: geda-user/2015/10/23/17:39:22
On Thu, Oct 22, 2015 at 06:57:30PM -0600, John Doty wrote:
>
> On Oct 22, 2015, at 3:48 PM, Carlos Nieves (cnieves DOT mail AT gmail DOT com) [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
>
> >
> >
> > 2015-10-22 2:01 GMT+02:00 John Doty <jpd AT noqsi DOT com>:
> >
> > On Oct 21, 2015, at 3:55 PM, Carlos Nieves (cnieves DOT mail AT gmail DOT com) [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
> >
> > > You know drc2 needs you to fill in some info in order to do the job correctly. Do you?
> >
> > Yes. But it doesn’t understand split symbols, especially slotted symbols together with unslotted symbols for a single package. It assumes hidden pins all have pintype=pwr. It doesn’t understand that backplane connectors don’t connect every signal on the backplane to every board.
> >
> > Yes, it doesn't. There is (a huge) room for improvement.
> > For unconnected pins there is the NoConnection directive. I cant remember for hidden pins...
> >
> >
> > > I agree drc2 could be better, but something is better than nothing.
> >
> > I agree, and I’ve used it successfully for years. Thank you. It is *a lot* better than nothing. But if you’re doing mixed-signal design using a lot of split symbols, like Kai-Martin’s slotted+power stuff, and a lot of tabular connections through pins2gsch, you are far outside drc2’s model of the application space.
> >
> >
> > Last modification to drc2 was in 2006... It seems that is no so annoying. Otherwise someone would have fixed that. ;)
>
> Along with DJ, I fear that many don’t use it. But there have been a couple of fixes since:
>
> ;; 2010-12-11: Fix stack overflows with large designs.
> ;; 2010-10-02: Applied patch from Karl Hammar. Do drc-matrix lower triangular
> ;; and let get-drc-matrixelement swap row/column if row < column.
>
>
> >
> > Reading the designer's mind is impossible for any tool. drc2 checks, other than duplicated refdes/slots, can be mainly used for digital design but hardly help for mixed signal.
>
> I wonder how many users are making single-supply digital MSI circuits any more? These days, my pure logic tends to collapse into an FPGA, and my digital DRC concerns wind up being 2.5V logic versus 3.3V logic and electromagnetic fanout issues on unterminated logic lines.
>
True, in one of my recent designs, there was one single logic gate in a
5 pin package, because it was necessary for the reset circuitry before the
FPGA wakes up. The other "logic" chips I may have are buffers and/or
line drivers/receivers.
SSI/MSI logic is essentially dead.
This said, I tried a long time ago to use DRC, and it never brought me
anything useful. It may sound presomptuous, but I believe that I have
never made a mistake that DRC would have caught, which is obviously not the
same as saying that I've never made a mistake, but I can't see how DRC
could detect a wrong connection in a complex network of passive components.
Gabriel
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