Mail Archives: geda-user/2015/10/21/07:10:04
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> I think it would be rather good to separate symbols from pin mapping and in
> such case symbols would have symbolic information only.
>
> In gschem schematic could be started with a fast sketch there details are
> filled in later then more information is available and this is one of the
> best things with gschem.
>
> To keep this strength symbols should be used to draw the schematic and
> mappings selected later. To make this work there would need to be a pin
> mapping attribute to select which mapping to use, this attribute could of
> course already have a default value and it could also be to a slot.
>
>
>
> I have used other tools there the mapping is added and in such case all
> information including value must be known then symbol is added which is
> usually not the case.
>
>
>
> Nicklas Karlsson
I think that one possible solution is to alow nested symbols, so we may create
heavy symbol that includes another light symbols. I did some tests and this
partially works!
The symbol 2N2222-1.sym defines component name/footprint and contains another
symbol transistor-npn.sym, which contains graphical representation and pins.
Gschem displays graphics and pins correctly but attributes from inner symbols
are not displayed or promoted.
Netlisting does not work too (at least by gnetlist).
To solve the pin mapping, the slotting mechanism could be used. To convert
internal device pins (E, B, C) to package pins (1, 2, 3) the following syntax
couuld be used:
T 900 1100 5 10 0 0 0 0 1
slot=1
T 900 1300 5 10 0 0 0 0 1
numslots=1
added to inner (light) symbol and:
T 900 1500 5 10 0 0 0 0 1
slotdef=1:3,2,1
to outer symbol.
Test symbols for 2N2222 transistors (hewy and light) and simple test circuit
are attached.
--
Wojciech Kazubski
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Content-Disposition: attachment; filename="2N2222-1.sym"
Content-Transfer-Encoding: 7Bit
Content-Type: application/x-geda-symbol; name="2N2222-1.sym"
v 20130925 2
C 0 0 1 0 0 transistor-npn.sym
T 900 300 8 10 1 1 0 0 1
device=2N2222
T 900 100 8 10 0 1 0 0 1
footprint=TO18
T 900 1100 5 10 0 0 0 0 1
slot=1
T 900 1300 5 10 0 0 0 0 1
numslots=1
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Content-Disposition: attachment; filename="transistor-npn.sym"
Content-Transfer-Encoding: 7Bit
Content-Type: application/x-geda-symbol; name="transistor-npn.sym"
v 20130925 2
P 600 1000 600 800 1 0 0
{
T 500 850 5 6 1 1 0 0 1
pinnumber=C
T 500 850 5 6 0 0 0 0 1
pinseq=1
T 500 850 5 6 0 1 0 0 1
pinlabel=C
T 500 850 5 6 0 1 0 0 1
pintype=pas
}
P 0 500 184 500 1 0 0
{
T 100 550 5 6 1 1 0 0 1
pinnumber=B
T 100 550 5 6 0 0 0 0 1
pinseq=2
T 100 550 5 6 0 1 0 0 1
pinlabel=B
T 100 550 5 6 0 1 0 0 1
pintype=pas
}
P 600 200 600 0 1 0 1
{
T 500 50 5 6 1 1 0 0 1
pinnumber=E
T 500 50 5 6 0 0 0 0 1
pinseq=3
T 500 50 5 6 0 1 0 0 1
pinlabel=E
T 500 50 5 6 0 1 0 0 1
pintype=pas
}
V 500 501 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 600 200 400 400 3 0 0 0 -1 -1
L 600 800 400 600 3 0 0 0 -1 -1
L 400 700 400 300 3 0 0 0 -1 -1
L 400 500 184 500 3 0 0 0 -1 -1
L 600 200 564 272 3 0 0 0 -1 -1
L 600 200 528 236 3 0 0 0 -1 -1
L 528 236 564 272 3 0 0 0 -1 -1
T 900 500 8 10 1 1 0 0 1
refdes=Q?
T 900 1500 5 10 0 0 0 0 1
slotdef=1:3,2,1
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Content-Disposition: attachment; filename="test1.sch"
Content-Transfer-Encoding: 7Bit
Content-Type: application/x-geda-schematic; name="test1.sch"
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C 44300 42900 1 0 0 2N2222-1.sym
{
T 45200 43200 5 10 1 1 0 0 1
device=2N2222
T 45200 43000 5 10 0 1 0 0 1
footprint=TO18
}
C 46100 42400 1 0 0 2N2222-1.sym
{
T 47000 42700 5 10 1 1 0 0 1
device=2N2222
T 47000 42500 5 10 0 1 0 0 1
footprint=TO18
}
N 44900 43900 46700 43900 4
N 46700 43900 46700 43400 4
N 44900 42900 46100 42900 4
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