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Date:	Mon, 12 Oct 2015 15:42:49 -0400
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Subject:	Re: [geda-user] A lesson from gnet-makefile
From:	"Evan Foss (evanfoss AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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On Mon, Oct 12, 2015 at 3:05 PM, DJ Delorie <dj AT delorie DOT com> wrote:
>
>> A schematic doesn't capture the relationships between the net
>> segments.
>
> I've seen many non-geda schematics that *do* try to at least give a
> symbolic view of the desired network topology, especially in cases of
> star grounds or joining analog and digital grounds.  Given that
> "joining grounds" is a popular request in pcb, perhaps we need to
> reconsider having nets be fully collapsed (both on pcb and gaf).
>
> What about a heirarchical net?  I.e.
>
> (net "unnamed-5" ("U1-4" "U5-3" "R1-1"))
>
> (net "unnamed-6"
>    (net "AGND" (...))
>    (net "DGND" (...))
>    )
>
>> But, suppose instead that we had a pin attribute that said "this pin
>> may draw three amps". The netlister could then deduce which paths on
>> a net need extra conductor.
>
> You also need to know the acceptable temperature rise, although that
> could be stored elsewhere.
>
>> the pair is a balanced transmission line
>
> I'm almost thinking those are common enough to be their own type,
> since they're something more than a wire but less than a component.
> Advanced layout tools let you route them as a single "signal" too.

This is related to what we were talking about earlier here.
https://bugs.launchpad.net/geda/+bug/698771
(I have since realized there are things in the example sch file that
could use tweeking)

I also had some off list talk with John Griessen who was looking even
farther out than we are (RF layout and verilog-ams).
The output format for gnetlist is an interesting question.


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