Mail Archives: geda-user/2015/09/09/15:13:50
John Griessen wrote:
> On 09/09/2015 12:21 PM, DJ Delorie wrote:
>> The question is, which syntax makes the most sense for us - what would
>> present the "least surprise" to the user?
>
>
> Verilog.
VHDL.
Seriously. In VHDL the syntax of ranges is quite intuitive:
"range 1 to 4" means 1,2,3,4
"range 4 downto 1" means 4,2,3,1
BTW, VHDL is just as relevant as verilog. It is the language of choice for
FPGA projects on this side of the pond. I have yet to see someone do a
verilog project in this institute :-)
---<)kaimartin(>---
--
Kai-Martin Knaak tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211
Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de
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