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<201508301802 DOT t7UI2twS031311 AT envy DOT delorie DOT com> | |
Date: | Mon, 31 Aug 2015 01:30:43 +0000 |
Message-ID: | <CAM2RGhRgPQG2WDFVb0SFvMbypyYKS2oYtD=851WHR6fOB4iWdA@mail.gmail.com> |
Subject: | Re: [geda-user] back annotation proposal (RFC) |
From: | "Evan Foss (evanfoss AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> |
To: | geda-user AT delorie DOT com |
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On Sun, Aug 30, 2015 at 6:02 PM, DJ Delorie <dj AT delorie DOT com> wrote: > > My ideas are still here: http://www.delorie.com/pcb/pin-mapping.html > > In your diagram, the "foo" block is gnetlist :-) That makes a lot of sense for the netlist but what if you change a footprint? I think there should be another tool that you run in parallel to gnetlist to handle that. -- Home http://evanfoss.googlepages.com/ Work http://forge.abcd.harvard.edu/gf/project/epl_engineering/wiki/
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