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Date:	Mon, 13 Jul 2015 20:00:00 +0200
From:	"Gabriel Paubert (paubert AT iram DOT es) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Subject:	Re: [geda-user] gEDA/gschem still alive?
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On Mon, Jul 13, 2015 at 08:50:10AM -0600, John Doty wrote:
> 
> On Jul 13, 2015, at 2:23 AM, Gabriel Paubert (paubert AT iram DOT es) [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
> 
> > The common point I see right now between these schematics is that
> > they have symbols with lots of pins. For components with a large number
> > of pins, I always split the part in several, easier to manage symbols,
> > except for the power supply part.
> 
> For things with a lot of pins, I usually just draw a box without pins, run a bus to it, and make the pin connections from a table with pins2gsch.awk. I get that into the documentation with pins2tex.awk. Diagrams are great for amplifiers and filters, but not very illuminating for complicated digital stuff. For me, a nicely-formatted table is a lot easier to read than a big mess of lines converging on a box.
> 

That's not very useful for what I do, I'm using a chip where the
recommended decoupling is 3 capacitors for every pair of power pins
(ground goes mostly through the central paddle). The capacitors take well
more space on the schematics than the rectangle for the symbol that 
that describes that part of the component.

Note that the rest of the component is split into manageable symbols
(most are below 10 pins, although I only really start to worry above 16, 
although some go higher).

Most of the symbols I create are unique to each project (always for
FPGA), and the pins are ordered to minimize (actually almost eliminate)
crossings on the schematics.

    Gabriel

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