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Subject:	Re: [geda-user] PCB users - Call for testing of polygon fixes
From:	Jonatan =?ISO-8859-1?Q?=C5kerlind?= <jonatan AT akerlind DOT nu>
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Date:	Tue, 17 Feb 2015 15:22:57 +0100
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On sön, 2015-02-15 at 22:48 +0000, Peter Clifton wrote:
...
> "UNINITIALISED directin in SubJ_Rule" (Typo is in the patch too!)
> 
> Please let me know, and ideally (if you can), send me a test-case.

Did I understand this correctly that I'm not supposed to be seeing any
of those messages when opening a layout? On a layout I am currently
working on I get a lot of these messages when opening, 278 to be exact.
They go down in number as I remove the polygons one by one, there is no
single of the polygons in there that causes them they all contribute by
a differing amount.

The layout can be found here:
https://github.com/natanoj/heatcontrol/blob/master/pcb/roomunit-psu.pcb
(tested with the current commit 6f2ecf1272ed in that repo)

I see no visual difference between the pcb binary I'm using from git
head mid December and the current HEAD with your four patches applied,
ending up with a sha of d3d3e9d106187f5df57b50de83681e882243985f.
-- 
Jonatan Ã…kerlind <jonatan AT akerlind DOT nu>

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