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Date: | Sun, 15 Feb 2015 13:00:06 +0100 |
From: | Lev <leventelist AT gmail DOT com> |
To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] work on gEDA |
Message-ID: | <20150215130006.4258b4c3@jive> |
In-Reply-To: | <20150215092144.EF6D381A5EB8@turkos.aspodata.se> |
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<20150215092144 DOT EF6D381A5EB8 AT turkos DOT aspodata DOT se> | |
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On Sun, 15 Feb 2015 10:21:44 +0100 (CET) karl AT aspodata DOT se wrote: > Be able to have the silk (or rather, the component outline) be able > to stick outside of the pcb area, would be useful for connectors, > switches, and such. That's already implemented. Just define the size of your drawing are in PCB's settings. Draw your real PCB outline on a layer called 'outline'. You can skip DRC on outline layer if you want. (I have to look it up, I can't recall it how.) Levente
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