Mail Archives: geda-user/2015/01/18/09:06:09
Hello Hagen and Evan,
Just an option:
I also use makefiles for my simulation, but I don't use make to its full
potential. Evan if you could share your solution I like to learn from that.
What I do is create a makefile which creates a commandfile and then
execute that commandfile
Basically what I do is solve the multiple simulations it in the .control
part of my commandfile and in addition I use different schematics.
Here is the simplified version of my makefile.
STEP = 10n
STOP = 20u
RX = R12
step1:
@echo Header > commandfile.cir
@echo .control >> commandfile.cir
@echo let testvalue = 10e3 >> commandfile.cir
@echo let stopvalue = 12e3 >> commandfile.cir
@echo let stepvalue = 1e3 >> commandfile.cir
@echo while testvalue le stopvalue >> commandfile.cir
@echo alter $(RX) = testvalue >> commandfile.cir
@echo tran $(STEP) $(STOP) >> commandfile.cir
@echo wrdata outfile_'"$$&testvalue"' "V(V1)" >> commandfile.cir
@echo let testvalue = testvalue + stepvalue >> commandfile.cir
@echo end >> commandfile.cir
@echo .endc >> commandfile.cir
@echo .include YOURNETLIST.net >> commandfile.cir
step2:
gnetlist -g spice-sdb -o YOURNETLIST.net YOURSCHEMATIC_V1.sch
ngspice -b commandfile.cir
step3:
gnetlist -g spice-sdb -o YOURNETLIST.net YOURSCHEMATIC_V2.sch
ngspice -b commandfile.cir
sim1: step1 step2
sim2: step1 step3
Just type "make sim1" or "make sim2".
You can have multiple while/foreach loops in the .control part and use
'alter' to change the value of the components.
The bit in the "@echo wrdata" is al little bit of a hack, the $ is a
special character in a makefile so I need to trick the makefile to
output the right string "$&testvalue" to the commandfile.cir.
Regards, Robert.
On 18/01/15 08:21, Hagen SANKOWSKI wrote:
> Hello Evan.
>
> I see.. You have one schematic/netlist for every variation, right?
> This was also one of my ideas - and keep it beside. I argued myself
> against this like: "How I can keep other parts (than the variation) of
> my schematic/netlist constistent during the whole development process?"
> It would be a mess of 'diff'ing text files (gschem,spice) all the time.
>
> Well, nevertheless, do you have a piece of Makefile which you can hand
> me out as an example? I'm sorry, I am very bad in writing good Makefiles.
> Thank you, Evan.
>
> Any other solutions?
>
> Regards,
> Hagen.
>
>
> Quoting Evan Foss <evanfoss AT gmail DOT com>:
>
>> I typically do this via Makefiles. I have the different parameters for
>> the simulations in the schematics that way they are printed along with
>> everything else when I do post script export of the schematics. I have
>> the different things that need to be connected in the circuits split
>> off again in different schematic pages. The Makefile just runs the
>> simulations mixing and matching schematic pages.
>>
>> Not to kick off the holy war but this is exactly what we have make for.
>>
>> Evan
>>
>> On Fri, Jan 16, 2015 at 8:01 AM, michalwd1979 <michalwd1979 AT o2 DOT pl>
>> wrote:
>>> Hello Hagen,
>>>
>>> I've done something like this using Python. I've used the output
>>> file to
>>> load data and plot them with Matplotliob and I've manually (from
>>> python)
>>> modified the simulation file.
>>> The problem is that You have to prepare the CIR file right, for
>>> example use
>>> .control, .endc block and include write command there. It is quite
>>> possible
>>> that I will find some examples of my old simulations if You are
>>> interested.
>>>
>>> Now look at the ngspice.py module, "runng" and "fromng" should be most
>>> important functions. There is also a "topwl" function that can
>>> create a PWL
>>> source subcircuit from given waveform data - nice to include real world
>>> signals gathered on scope to simulation.
>>>
>>> Best Regards,
>>> Michael W.
>>>
>>>
>>> Dnia 16 stycznia 2015 12:16 Hagen SANKOWSKI
>>> <hsank AT nospam DOT chipforge DOT org>
>>> napisał(a):
>>>
>>>
>>>
>>> Hello geda-users!
>>>
>>> I like to run a bunch of simulations with ngspice, in the way of
>>> - run a netlist
>>> - change not only one parameter (sweep I know) but also replace
>>> circuits/models
>>> - run the modified netlist again
>>> - compare the results 'auto-magic'
>>> all controled by a script.
>>>
>>> The Tcl Interface (in contrast to the geda scheme stuff) I already
>>> noticed.
>>> I wonder if someone has an idea/script/example/hint how to do this
>>> efficently?
>>>
>>> Regards,
>>> Hagen.
>>>
>>>
>>>
>>
>>
>>
>> --
>> Home
>> http://evanfoss.googlepages.com/
>> Work
>> http://forge.abcd.harvard.edu/gf/project/epl_engineering/wiki/
>
>
>
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