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Date:	Sun, 18 Jan 2015 08:21:53 +0100
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From:	Hagen SANKOWSKI <hsank AT nospam DOT chipforge DOT org>
To:	geda-user AT delorie DOT com
Subject:	Re: [geda-user] Bunch Simulation ngspice
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Hello Evan.

I see.. You have one schematic/netlist for every variation, right?
This was also one of my ideas - and keep it beside. I argued myself
against this like: "How I can keep other parts (than the variation) of
my schematic/netlist constistent during the whole development process?"
It would be a mess of 'diff'ing text files (gschem,spice) all the time.

Well, nevertheless, do you have a piece of Makefile which you can hand
me out as an example? I'm sorry, I am very bad in writing good Makefiles.
Thank you, Evan.

Any other solutions?

Regards,
Hagen.


Quoting Evan Foss <evanfoss AT gmail DOT com>:

> I typically do this via Makefiles. I have the different parameters for
> the simulations in the schematics that way they are printed along with
> everything else when I do post script export of the schematics. I have
> the different things that need to be connected in the circuits split
> off again in different schematic pages. The Makefile just runs the
> simulations mixing and matching schematic pages.
>
> Not to kick off the holy war but this is exactly what we have make for.
>
> Evan
>
> On Fri, Jan 16, 2015 at 8:01 AM, michalwd1979 <michalwd1979 AT o2 DOT pl> wrote:
>> Hello Hagen,
>>
>> I've done something like this using Python. I've used the output file to
>> load data and plot them with Matplotliob and I've manually (from python)
>> modified the simulation file.
>> The problem is that You have to prepare the CIR file right, for example use
>> .control, .endc block and include write command there. It is quite possible
>> that I will find some examples of my old simulations if You are interested.
>>
>> Now look at the ngspice.py module, "runng" and "fromng" should be most
>> important functions. There is also a "topwl" function that can create a PWL
>> source subcircuit from given waveform data - nice to include real world
>> signals gathered on scope to simulation.
>>
>> Best Regards,
>> Michael W.
>>
>>
>> Dnia 16 stycznia 2015 12:16 Hagen SANKOWSKI <hsank AT nospam DOT chipforge DOT org>
>> napisaƂ(a):
>>
>>
>>
>> Hello geda-users!
>>
>> I like to run a bunch of simulations with ngspice, in the way of
>> - run a netlist
>> - change not only one parameter (sweep I know) but also replace
>> circuits/models
>> - run the modified netlist again
>> - compare the results 'auto-magic'
>> all controled by a script.
>>
>> The Tcl Interface (in contrast to the geda scheme stuff) I already noticed.
>> I wonder if someone has an idea/script/example/hint how to do this
>> efficently?
>>
>> Regards,
>> Hagen.
>>
>>
>>
>
>
>
> --
> Home
> http://evanfoss.googlepages.com/
> Work
> http://forge.abcd.harvard.edu/gf/project/epl_engineering/wiki/



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