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Date:	Mon, 17 Nov 2014 16:42:55 -0500
From:	Chris Arena <chris AT hallowell DOT com>
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To:	geda-user AT delorie DOT com
Subject:	Re: [geda-user] PCB and 3D V
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Reply-To:	geda-user AT delorie DOT com

Hi,

How do you control the SFlag "clearline" in PCB? I'm getting some run 
segments with that set, some not. It prevents the polygon fill from 
working when its not set.

Thanks,

Chris

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