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	Thu, 22 May 2014 23:56:57 -0700 (PDT)
Message-ID:	<537EF137.5020407@gmail.com>
Date:	Fri, 23 May 2014 08:56:55 +0200
From:	onetmt <onetmt AT gmail DOT com>
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To:	geda-user AT delorie DOT com
Subject:	Re: [geda-user] Re: Bug in PCB or in my design? Gerbers and layout
	do not agree
References:	<CAHBDEvapNFZKjRmK7ty2j90U0R7Dg4KzRALLqh7NwvU+rTTzSw AT mail DOT gmail DOT com> <CAHBDEvZVTPOC-eQ_QzwxQz9JGxhmruE7pkhs_wM33F8m4g7MwQ AT mail DOT gmail DOT com>
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Reply-To:	geda-user AT delorie DOT com

Il 23/05/2014 00:28, Thomas Oldbury ha scritto:
> Anyone know what might cause this. Anything I might be missing. Thanks
> 
> 
> On 19 May 2014 00:41, Thomas Oldbury <toldbury AT gmail DOT com
> <mailto:toldbury AT gmail DOT com>> wrote:
> 
>     See attached PCB file and gerbers. There is a direct shorting
>     polygon across a via and a pin of a power TSSOP U18 (near top center
>     of board). This isn't present on PCB layout nor does any net
>     shorting or DRC error show. 
> 
>     The short also appears in the photorender of the board.
> 
>     Bug in PCB or something I'm doing wrong ? 
> 
>     This created some problems for a recent project I was doing since we
>     didn't see this short until we got the board made.  Luckily we were
>     able to work around it.
> 
>     PCB version info:
> 
>     "This is PCB, an interactive
>     printed circuit board editor
>     version 20110918

This is the same release I have been using for (at least) the last 2
years - Debian tends to be quite conservative with new releases. I have
produced a dozen of new projects, but I didn't find anything of this
kind. From what you are (poorly) reporting it could seem a problem
somewhere in your netlist - maybe some problems with your footprints?

> 
>     Compiled on Jan  3 2012 at 06:03:59"
> 
> 


-- 
Hofstadter's Law:
"It always takes longer than you expect, even when you take into account
Hofstadter's Law."

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