Mail Archives: geda-user/2013/11/17/18:10:25
On Sun, 2013-11-17 at 23:36 +0100, Kai-Martin Knaak wrote:
> > Great (when it really works, I will try it soon...)
>
> I used this successfully for semi-automatic creation of layouts that
> contain lots of similar structures. It works all right as long as you
> make sure, the layer stack is identical to the current layout.
Do you know how the file header must look?
I tried first with this complete header
# release: pcb 20110918
# To read pcb files, the pcb version (or the git source date) must be >=
the file version
FileVersion[20070407]
PCB["" 350000 330000]
Grid[3900.0 1800 100 1]
Cursor[1800 100 2.000000]
PolyArea[3100.006200]
Thermal[0.500000]
DRC[1000 1000 1000 1000 1500 1000]
Flags("rubberband,nameonpcb,alldirection,swapstartdir,uniquename,snappin")
Groups("4,5,6,c:1,2,3,s:8:7")
Styles["Signal,1000,4000,2000,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,800,3600,2000,1000"]
followed by
Layer(1 "solder")
(
)
statements. That works. Without that header, I got only a message like
"invalid file format". So some entries from that header seems to be
necessary.
And, the most important question: May there exist a trick to position
the imported traces exactly? My traces from my router have arbitrary
absolute start and end coordinates, so grid snap will not help. And
manually positioning will never be exact. Maybe when I use a frame of
outer traces with coordinates which are integer multiples of the grid?
Best regards
Stefan
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