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Message-ID: | <527D54A0.4050209@plastitar.com> |
Date: | Fri, 08 Nov 2013 16:16:16 -0500 |
From: | "P. Taylor" <phil AT plastitar DOT com> |
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To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] Hierarchical designs |
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On 11/8/2013 3:28 PM, bsalinux AT gmail DOT com wrote: > I had that initially in the sym but later I removed it and tried > adding that attribute in the top level schematic. Either way it > doesn't work for me. > > http://i.imgur.com/rA6fQDP.png For hierarchical designs I take the minimalist approach of having dumb 'boxes' in the top level schematic with a simple source attribute added. For example the toplevel schematic might be sch.sch with the following subschematics: sch_uc.sch sch_pwr.sch sch_analog.sch (etc) inside of sch.sch, there will be that attributes: source=sch_uc.sch source=sch_pwr.sch source=sch_usb.sch (etc) attached to a simple 'box' graphic. all of these schematics reside in one directory, so they stay together by filename prefix. There need not be any connectivity between the schematics for the source attribute to work. For instantiated or repeated subschematics, the same is true. Have a file called sch_sub_block1.sch in the directory where the other schematics are, and add the attribute source=sch_sub_block1.sch to a symbol in the drawing. This will automatically create unique part names for all the components in the design. I've done this with completely ridiculous discrete sub-circuit blocks and geda/PCB never miss a beat. Best, Phil Taylor
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