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Message-ID: | <526DB611.9060502@ecosensory.com> |
Date: | Sun, 27 Oct 2013 19:55:45 -0500 |
From: | John Griessen <john AT ecosensory DOT com> |
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To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] Power to ICs with numslots > 1 |
References: | <CANhYM9G+eK=9V8L59PyU8nCOO22GVVF1bRb3TRC9kbACazfg8w AT mail DOT gmail DOT com> <201310261908 DOT r9QJ8Vv8025803 AT envy DOT delorie DOT com> <526C1AF1 DOT 8000107 AT sbcglobal DOT net> <CANhYM9GCyOjemHcYBv75kt2D6973F_4Uymx1UusjPCQ9JokoAg AT mail DOT gmail DOT com> <alpine DOT BSF DOT 2 DOT 00 DOT 1310261615520 DOT 66315 AT earl-grey DOT cloud9 DOT net> |
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On 10/26/2013 03:24 PM, Stuart Brorson wrote: > For larger, more complicated parts (i.e. with lots of power/GND pins), > I think it's better to have a separate schematic symbol for the chip > power pins with all the power/GND pins attached to the symbol. Then > you can tie them to power/GND as you see fit, and add decoupling caps, > chokes, etc. as necessary to the symbol. This is important for parts > which call out complicated bypassing/decoupling schemes. Meanwhile, > have a separate symbol (with the same refdes) elsewhere in the > schematic with all the logic pins or other component functionality > attached to pins. Like that method hint. JG
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