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From:	Joshua Lansford <joshua DOT lansford AT laserlinc DOT com>
Date:	Sun, 1 Sep 2013 13:29:08 -0400
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Subject:	Re: [geda-user] VE
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--bcaec53d5ee143e20404e555cce1
Content-Type: text/plain; charset=ISO-8859-1

>
>
> I don't see any Makefile or README files
>

I will try to quickly create a README with instructions on how to compile
and run.

>
> > Currently all the vars are stuck at 32 bits, but Verilog
> > synthesizers generally get rid of unused bits anyway.
>
> I don't understand that statement.  I'm very interested in being
> able to write generic numeric code, have it simulate (at first)
> at "infinite" precision, then establish real-life bounds and precision
> needs based on SNR goals, resulting in concrete scaled-fixed-point
> variables.  That is well beyond existing language capabilities.
>

I see.  Each var should be able to be declared with a specified number of
bits, hopefully including floating point.  Currently it is hardwired to 32.
 Infinite precision perhaps would be best simulated
before Verilog compilation but this does not exist yet.

>
>  I am not aware of any other
> > open source project working in this direction.
>
> Another possibly related project is migen
> https://github.com/milkymist/migen
>
> Ok, Thanks.

--bcaec53d5ee143e20404e555cce1
Content-Type: text/html; charset=ISO-8859-1
Content-Transfer-Encoding: quoted-printable

<div dir=3D"ltr"><div class=3D"gmail_extra"><div class=3D"gmail_quote"><blo=
ckquote class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-left=
-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;paddi=
ng-left:1ex">

<div class=3D"im"><br></div>
I don&#39;t see any Makefile or README files=A0<br></blockquote><div><br></=
div><div style>I will try to quickly create a=A0README=A0with instructions =
on how to compile and run.</div><blockquote class=3D"gmail_quote" style=3D"=
margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,20=
4,204);border-left-style:solid;padding-left:1ex">


<div class=3D"im"><br>
&gt; Currently all the vars are stuck at 32 bits, but Verilog<br>
&gt; synthesizers generally get rid of unused bits anyway.<br>
<br>
</div>I don&#39;t understand that statement. =A0I&#39;m very interested in =
being<br>
able to write generic numeric code, have it simulate (at first)<br>
at &quot;infinite&quot; precision, then establish real-life bounds and prec=
ision<br>
needs based on SNR goals, resulting in concrete scaled-fixed-point<br>
variables. =A0That is well beyond existing language capabilities.<br></bloc=
kquote><div style><br></div><div style>I see. =A0Each var should be able to=
 be declared with a specified number of bits,=A0hopefully=A0including float=
ing point. =A0Currently it is hardwired to 32. =A0Infinite=A0precision=A0pe=
rhaps would be best simulated before=A0Verilog=A0compilation but this does =
not exist=A0yet.</div>

<blockquote class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-=
left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;p=
adding-left:1ex">
<div class=3D"im"><br>=A0I am not aware of any other<br>
&gt; open source project working in this direction.<br>
<br>
</div>Another possibly related project is migen<br>
<a href=3D"https://github.com/milkymist/migen" target=3D"_blank">https://gi=
thub.com/milkymist/migen</a><br>
<span class=3D""><font color=3D"#888888"><br></font></span></blockquote><di=
v style>Ok, Thanks.</div></div><br></div></div>

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