delorie.com/archives/browse.cgi | search |
X-Authentication-Warning: | delorie.com: mail set sender to geda-user-bounces using -f |
X-Recipient: | geda-user AT delorie DOT com |
DKIM-Signature: | v=1; a=rsa-sha256; c=relaxed/relaxed; |
d=gmail.com; s=20120113; | |
h=mime-version:sender:in-reply-to:references:date:message-id:subject | |
:from:to:content-type; | |
bh=a1caJpdQFQ4bRudsUc6ZcLwkx1oFUO7jfbAOAN+ih+w=; | |
b=k/Md50s4aoWx+ncvblDF9ULAc6vajpJX51HUzABPuIXIhJHCOL/STDBFJsCiiF1sI1 | |
gRRqstXOizlktC93z2+qQQldR87NihO1hje0pRJKR1wxjXguhbYFUk0nwj6/3c2mNCJ0 | |
8sJ13afnYUokvNN77gbVK8dnedyKbhRbraxo0bVtemR2E6sAn5bzRWi+4cJLZVaJ7yU8 | |
wb7Je90ehft6puCw5U2UbYetK5aI852/BKUbbySK3wBQffA0kqMcj2lKyPX+IQ5VGSBG | |
uDkfqMcad2tn5HLz9n3l+IPGC+VidmS82YT/mpqdI+hpZb6Vjuar/d02u/6AFGCZ7rJG | |
hSag== | |
MIME-Version: | 1.0 |
X-Received: | by 10.58.165.70 with SMTP id yw6mr7749557veb.19.1377553820138; |
Mon, 26 Aug 2013 14:50:20 -0700 (PDT) | |
Sender: | silicon DOT on DOT inspiration AT gmail DOT com |
In-Reply-To: | <CAC4O8c9Zzc4OGqGn-zc0T-KdYkXch+fwQjyuuEF=P_ZQtjLmnw@mail.gmail.com> |
References: | <CAC4O8c9Zzc4OGqGn-zc0T-KdYkXch+fwQjyuuEF=P_ZQtjLmnw AT mail DOT gmail DOT com> |
Date: | Tue, 27 Aug 2013 07:50:20 +1000 |
X-Google-Sender-Auth: | QSNCa0egnOobiO9ciLoAXchaagc |
Message-ID: | <CAKakQcepAOUwFRZMPHbW6cZVt5ggFjPutyJ3jL5xE=88N+2duw@mail.gmail.com> |
Subject: | Re: [geda-user] keeping solder mask off thermal rectangles? |
From: | Stephen Ecob <stephen DOT ecob AT sioi DOT com DOT au> |
To: | geda-user AT delorie DOT com |
Reply-To: | geda-user AT delorie DOT com |
Errors-To: | nobody AT delorie DOT com |
X-Mailing-List: | geda-user AT delorie DOT com |
X-Unsubscribes-To: | listserv AT delorie DOT com |
--047d7b6776781bc2dc04e4e0bef1 Content-Type: text/plain; charset=ISO-8859-1 Solder mask on vs. solder mask off doesn't make a lot of difference: * Radiated infrared emission is better with solder mask on, especially if the solder mask is matte and a darker colour * Convection losses are slightly reduced by the thermal insulation effect of solder mask So if you have significant airflow solder mask off may be better but if you have still air and higher temperatures solder mask on may be better If you do want solder mask off then the easiest way is to add a rectangular SMD pad. On Tue, Aug 27, 2013 at 4:04 AM, Britton Kerin <britton DOT kerin AT gmail DOT com>wrote: > > I've got a part with a thermal pad on the bottom of a SOIC package. > > I was able to create rectangles on the solder and component sides of the > board, then connect them with vias, and turn the vias into thermals with > complete connections using thermal tool and shift-click. > > The last thing I think I want to do is keep the solder mask off the > rectangular areas. I think. Or perhaps it doesn't really matter for heat > dissipation? > > Anyway I haven't been able to sort out how to do this last thing. > Suggestions? > > Thanks, > Britton > > -- Stephen Ecob Silicon On Inspiration Sydney Australia www.sioi.com.au --047d7b6776781bc2dc04e4e0bef1 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable <div dir=3D"ltr">Solder mask on vs. solder mask off doesn't make a lot = of difference:<div style>* Radiated infrared emission is better with solder= mask on, especially if the solder mask is matte and a darker colour</div> <div style>* Convection losses are slightly reduced by the thermal insulati= on effect of solder mask</div><div style>So if you have significant airflow= solder mask off may be better but if you have still air and higher tempera= tures solder mask on may be better</div> <div style><br></div><div style>If you do want solder mask off then the eas= iest way is to add a rectangular SMD pad.</div></div><div class=3D"gmail_ex= tra"><br><br><div class=3D"gmail_quote">On Tue, Aug 27, 2013 at 4:04 AM, Br= itton Kerin <span dir=3D"ltr"><<a href=3D"mailto:britton DOT kerin AT gmail DOT com= " target=3D"_blank">britton DOT kerin AT gmail DOT com</a>></span> wrote:<br> <blockquote class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:1p= x #ccc solid;padding-left:1ex"><div dir=3D"ltr"><br>I've got a part wit= h a thermal pad on the bottom of a SOIC package.<br><br>I was able to creat= e rectangles on the solder and component sides of the board, then connect t= hem with vias, and turn the vias into thermals with complete connections us= ing thermal tool and shift-click.<br> <br>The last thing I think I want to do is keep the solder mask off the rec= tangular areas.=A0 I think.=A0 Or perhaps it doesn't really matter for = heat dissipation?<br><br>Anyway I haven't been able to sort out how to = do this last thing.=A0 Suggestions?<br> <br>Thanks,<br>Britton<br><br></div> </blockquote></div><br><br clear=3D"all"><div><br></div>-- <br>Stephen Ecob= <br>Silicon On Inspiration<br>Sydney Australia<br><a href=3D"http://www.sio= i.com.au" target=3D"_blank">www.sioi.com.au</a><br> </div> --047d7b6776781bc2dc04e4e0bef1--
webmaster | delorie software privacy |
Copyright © 2019 by DJ Delorie | Updated Jul 2019 |