delorie.com/archives/browse.cgi | search |
X-Authentication-Warning: | delorie.com: mail set sender to geda-user-bounces using -f |
X-Recipient: | geda-user AT delorie DOT com |
DKIM-Signature: | v=1; a=rsa-sha1; c=relaxed; d=laserlinc.com; h= |
message-id:date:from:mime-version:to:subject:references | |
:in-reply-to:content-type:content-transfer-encoding; s= | |
laserlinc.com; bh=uNdqLDWfClEdBtjWFlPVIlNda6U=; b=B8kKvqHZto1DqI | |
nnbMOSCCUNtbhWq94FLIRYwvlPqvT63YFiogn/ZgliO5rVLqczsv3oOH+vqqzgbV | |
8s1d7Sfqcazp8HGXCjMblAoY9G3vAp8os++XBJGF1pwDYeD377eilVLBVSWE5AUU | |
xac2nnlQJgDmNsXxVhywhpVBIrDc4= | |
Message-ID: | <5139E570.9060509@laserlinc.com> |
Date: | Fri, 08 Mar 2013 08:19:44 -0500 |
From: | Joshua Lansford <Joshua DOT Lansford AT laserlinc DOT com> |
User-Agent: | Mozilla/5.0 (X11; Linux i686; rv:17.0) Gecko/20130215 Thunderbird/17.0.3 |
MIME-Version: | 1.0 |
To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] PHDL to PCB conversion path? |
References: | <BAY167-W13054F420737D6BC4ABA461C4E50 AT phx DOT gbl> <3B7337D3-C547-42A5-8480-38379A3EB076 AT noqsi DOT com> |
In-Reply-To: | <3B7337D3-C547-42A5-8480-38379A3EB076@noqsi.com> |
Reply-To: | geda-user AT delorie DOT com |
On 03/07/2013 10:37 PM, John Doty wrote: >> Does it make sense for us to write gEDA schematic files? > Quite possibly. While creating schematics with human-readable graphics is an AI problem, schematics that gnetlist can handle are much easier. Seehttp://www.gedasymbols.org/user/john_doty/tools/pins2gsch.html Here is a fun idea: When you generate the schematic file, tag each component with an id. (gschem allows custom tags) Then when you export again, any components and connections that already exist can stay where they are and only the difference in wiring and components would be added which would then be adjusted by hand. All graphical decoration stuff could be left alone. This would allow folks to iteratively complete their design using PHDL as the foundation and graphically place the symbols. Just as it helps to make a schematic before making a pcb layout, it would help to make a PHDL design before making a schematic. Thus the relationship between the first two probably would apply to the second. Just a higher, more powerful abstraction level. This would give the users of PHDL the added bonus of having a graphical representation to double check that their language use is correct as well as something to give the layout folks with the netlist if they are not going to do the layout themselves. Just my 2 cents. :-) Someone had to mention this idea. It was begging to be brought up. ~Joshua
webmaster | delorie software privacy |
Copyright © 2019 by DJ Delorie | Updated Jul 2019 |