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Date:	Fri, 08 Mar 2013 00:00:17 -0500
From:	Dan McMahill <dan AT mcmahill DOT net>
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Subject:	Re: [geda-user] PHDL to PCB conversion path?
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On 3/7/2013 5:21 AM, peter dudley wrote:

> PHDL replaces schematic entry in the the PCB design flow.  As such,
> our compiler must write out netlist files in the correct format for
> each layout tool we want to support.


> I am seeking advice here.  Can anyone offer an opinion as to the best
> file format to write in order to get our netlist into the gEDA/PCB
> layout tool?
>
> I see gnetlist converts gEDA schematic files to something that
> geda/pcb can read.  Does it make sense for us to write gEDA schematic
> files?  Is there a simpler or more stable file format we should write
> to get into this open source layout tool.
>

Hi Pete,

Here are a couple of thoughts.  Most people who use pcb for layout use 
gschem (a schematic editor) to capture the design.  Then gnetlist is 
used to produce two files.  The first file is a very simple netlist file 
which has the basic connectivity information.  See 
http://pcb.geda-project.org/pcb-20110918/pcb.html#Netlist-File for some 
information on the format.  The second file has a bunch of commands that 
pcb uses to create the various footprint instances.  To be more concrete 
about it, the actions file says (in English)

   "create an instance of a TQFP64 called U1"
   "create an instance of a SOIC8 called U2"
   etc.

the netlist file says (in English)

   "The net called 'FOO' connects to pin 3 and 6 of U1 and pin 9 of U2"

There is a similar flow in which instead of creating a pcb actions file 
(which gnetlist can do directly), a different program is brought into 
the mix called gsch2pcb.  That program calls gnetlist to produce a 
netlist and also loads and existing pcb file, looks for instances in the 
netlist which don't exist in the pcb file, and creates them.  The first 
flow I described was intended to replace the gsch2pcb flow.

Now inside of the PCB layout tool, you load the netlist and the tool now 
knows the required connectivity.

Oh, there is another file which gnetlist can produce which is another 
actions file (pcbpins is the name to search for).  This file can be 
loaded by pcb to go an rename the generic names (1,2,3,etc) on the 
footprint instances with names like "IN+" "IN-" "OUT", etc.

Good luck with your tool.  I think there is a need for that in many 
cases as you have identified.  Have you given any thought to how one 
could possibly integrate PHDL and a schematic tool together?  For 
example, suppose I wanted a circuit board which contained some high pin 
count things (FPGA, uP, etc) along with some things for which a 
schematic really is more appropriate (say a transistor level RF power 
amplifier).  Do you have a facility in PHDL to accept a block from 
another source?  I'm thinking of something like where you have a 
schematic page for some analog or RF block, that gets netlisted out to 
some appropriate format and PHDL just instantiates that as a block.

-Dan

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