Mail Archives: geda-user/2012/11/01/19:17:09
On Nov 1, 2012, at 12:34 PM, DJ Delorie wrote:
>
>> Is there any plans to implement back annotation ? Sometimes slot
>> swapping, pin swapping etc would be useful. Even adding components
>> (I regularly forget some blocking capacitors) would be fine. But I
>> understand that this has really low priority...
>
> I wrote up some notes about this:
>
> http://www.delorie.com/pcb/pin-mapping.html
>
> It's part of this:
>
> http://www.delorie.com/pcb/component-dbs.html
>
> The idea is that symbols have a symbolic pin name, and the component
> you choose maps those symbolic pin names to physical pin numbers and
> slots. Then, there is no "back" annotation; PCB tells gnetlist which
> mappings/slottings it has, and gnetlist chooses from unused pins/slots
> to satisfy new connections.
>
> The only catch is, you need a way of uniquely identifying "that" gate
> in a heirarchical schematic, independent of refdes.
A barrier to this is gnetlist's architecture. For its current applications, gnetlist has a well designed API between the front end and the back end. However, for more advanced applications like the above, there are difficulties.
The API is opaque: only selected data from the (C) front end is visible to the (Guile) back end. It's not merely a matter of information hiding: C data structures are not generally usable by Guile code.
The back end has little control or ability to see expansion of hierarchy, slot selection, and collapse of network segments into networks.
These problems will be difficult to fix by patching gnetlist, as it is a consequence of the architecture. A minor bit of progress in this area, adding (gnetlist:get-all-package-attributes) to the API, needed weeks of wrangling, and that was two years ago. At this rate, the API won't be adequately transparent for advanced gnetlist usage until the 22nd century :-(
John Doty Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd AT noqsi DOT com
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