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Date:	Wed, 24 Oct 2012 09:53:22 -0700
From:	Colin D Bennett <colin AT gibibit DOT com>
To:	geda-user AT delorie DOT com
Subject:	Re: [geda-user] Trace width - best practices?
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On Wed, 24 Oct 2012 02:42:22 +0200
Kai-Martin Knaak <kmk AT familieknaak DOT de> wrote:

> Stephen Ecob <stephen DOT ecob AT sioi DOT com DOT au> schrieb am 24. October
> 2012:
>=20
> > > Note that I don't want the whole net to be made from wider
> > > traces, only connections between some of the pins of the same
> > > net should be made wider.
>=20
> This is the tricky part. You want to divide a net in high current
> and low current parts. This calls for modifications in the data
> structure. The current data structure assumes that every segment
> of a net is equivalent.

Actually, being able to break a net down into some more structure
would be helpful for a lot of other things as well.

Consider a star ground scheme on a board.  Perhaps analog and
digital grounds, or just having separate power+return conductors
to the star point for a high-power component, to prevent ground
rise for other components on the board.

Currently we can use tricks with gschem and pcb to define
analog/digital ground or star grounding by inserting a zero-ohm
resistor or solder bridge, and optionally shorting that element in
PCB layout with a line (will cause DRC errors) or a text "-" or "|"
on the copper layer (no DRC error, but be careful with copper text
since you could shoot yourself if you short the wrong nets somehow.

Regards,
Colin

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