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Subject:	Re: [geda-user] Trace width - best practices?
From:	Stefan Salewski <mail AT ssalewski DOT de>
To:	geda-user AT delorie DOT com
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Date:	Wed, 24 Oct 2012 01:10:30 +0200
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On Tue, 2012-10-23 at 16:55 -0600, John Doty wrote:
> On Oct 23, 2012, at 4:07 PM, Stephen Ecob wrote:
> 
> >> 
> >>        In a related question: is it possible to include hints for
> routing
> >> and placement in the schematics? For example:
> >> 
> >> - this decoupling capacitor should be placed as close to this chip
> as possible
> > 
> > Similarly: the idea is a good one, it has been suggested before, but
> > no one has coded it up.
> > IIRC gschem can add suitable attributes to nets, but PCB doesn't
> have
> > any code to act on net
> > attributes.
> 
> Unfortunately, while gschem can attach arbitrary attributes to nets,
> gnetlist cannot retrieve them. I believe all of the various import
> strategies PCB uses work through gnetlist.
> 
> John Doty              Noqsi Aerospace, Ltd.

I think I was one of the advocates for that type of design: Assign all
relevant information to nets in the schematic (trace width, clearance,
max length, impedance, .., by single attributes or net 'classes') and
let do all the rest by the autorouter.

I still think that is the way electronic design should be done today.

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