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Subject: | Re: [geda-user] Trace width - best practices? |
From: | John Doty <jpd AT noqsi DOT com> |
In-Reply-To: | <CAKakQccEOLFD0bbe6ydry-6YN7xsvjJAcbrTSt6DAYHJN-ohrA@mail.gmail.com> |
Date: | Tue, 23 Oct 2012 16:55:20 -0600 |
Message-Id: | <248769EB-BD92-4C61-B860-0ED794DF2753@noqsi.com> |
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On Oct 23, 2012, at 4:07 PM, Stephen Ecob wrote: >> >> In a related question: is it possible to include hints for routing >> and placement in the schematics? For example: >> >> - this decoupling capacitor should be placed as close to this chip as possible > > Similarly: the idea is a good one, it has been suggested before, but > no one has coded it up. > IIRC gschem can add suitable attributes to nets, but PCB doesn't have > any code to act on net > attributes. Unfortunately, while gschem can attach arbitrary attributes to nets, gnetlist cannot retrieve them. I believe all of the various import strategies PCB uses work through gnetlist. John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ jpd AT noqsi DOT com
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