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Date:	Tue, 23 Oct 2012 21:24:44 +0200
From:	Jan Kasprzak <kas AT fi DOT muni DOT cz>
To:	geda-user AT delorie DOT com
Subject:	[geda-user] Trace width - best practices?
Message-ID:	<20121023192443.GK524@fi.muni.cz>
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Reply-To:	geda-user AT delorie DOT com

	Hello,

in my board, I want to have some connections built for higher currents.
Is it possible to mark them somehow (maybe even at the schmatics level?),
and then let the autorouter to do its work, or do they need to be routed
manually? Note that I don't want the whole net to be made from wider traces,
only connections between some of the pins of the same net should be made wider.

	In a related question: is it possible to include hints for routing
and placement in the schematics? For example:

- this decoupling capacitor should be placed as close to this chip as possible

or

- these four connections together form a current loop, and the loop as a whole
	should be made as short as possible

	Can gschem/pcb do this? Thanks,

-Yenya
	
-- 
| Jan "Yenya" Kasprzak  <kas at {fi.muni.cz - work | yenya.net - private}> |
| GPG: ID 1024/D3498839      Fingerprint 0D99A7FB206605D7 8B35FCDE05B18A5E |
| http://www.fi.muni.cz/~kas/    Journal: http://www.fi.muni.cz/~kas/blog/ |
Please don't top post and in particular don't attach entire digests to your
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