X-Authentication-Warning:	delorie.com: mail set sender to geda-user-bounces using -f
X-Recipient:	geda-user AT delorie DOT com
X-CT-Class:	Clean
X-CT-Score:	0.00
X-CT-RefID:	str=0001.0A020201.50860573.0070,ss=1,re=0.000,fgs=0
X-CT-Spam:	0
X-Authority-Analysis:	v=2.0 cv=H8hZMpki c=1 sm=1
	a=K/FgzVrZepICM3bxWKE4VA==:17 a=HcM4K1ljHdYA:10 a=G8Uczd0VNMoA:10
	a=kj9zAlcOel0A:10 a=kviXuzpPAAAA:8 a=ryU3b-kstMwA:10 a=j9Q8MGFPgc24h2WB3W4A:9
	a=CjuIK1q_8ugA:10 a=K/FgzVrZepICM3bxWKE4VA==:117
X-CM-Score:	0.00
Authentication-Results:	cox.net; auth=pass (PLAIN)
	smtp.auth=ebrombaugh1 AT cox DOT net
Subject:	Re: [geda-user] FPGA / CPLD development with Linux
Mime-Version:	1.0 (Apple Message framework v1085)
From:	Eric Brombaugh <ebrombaugh1 AT cox DOT net>
In-Reply-To:	<5085FC96.4060106@innocent.com>
Date:	Mon, 22 Oct 2012 19:48:19 -0700
Message-Id:	<2CD58DD0-4FB2-4298-8C12-BFBC5E695459@cox.net>
References:	<1350863030 DOT 93187 DOT YahooMailNeo AT web121004 DOT mail DOT ne1 DOT yahoo DOT com> <5084AA9A DOT 404 AT optonline DOT net> <50853B5E DOT 9060107 AT laserlinc DOT com> <5085FC96 DOT 4060106 AT innocent DOT com>
To:	geda-user AT delorie DOT com
X-Mailer:	Apple Mail (2.1085)
X-MIME-Autoconverted:	from quoted-printable to 8bit by delorie.com id q9N2mO8o008923
Reply-To:	geda-user AT delorie DOT com
Errors-To:	nobody AT delorie DOT com
X-Mailing-List:	geda-user AT delorie DOT com
X-Unsubscribes-To:	listserv AT delorie DOT com

On Oct 22, 2012, at 7:10 PM, Gus Fantanas wrote:

> ChipScope is a great tool, but, if I am not mistaken, it can work only if there are enough resources left on the host FPGA. So, as the  resource utilization of the targeted FPGA increases, shouldn't chipScope be expected to be less and less capable because there would be fewer and fewer unutilized resources available to it?

Chipscope is handy to have and doesn't necessarily require a lot of resources depending on what you want to do with it. When I use it I primarily instantiate I/O busses that I can control/observe from the GUI and sometimes use the internal logic analyzer (ILA). The I/O busses take hardly any logic at all. the ILA uses RAM (block or distributed) depending on how many signals you observe and how deep. It's all very adaptable and not generally too large - I've used it on some of their largest Virtex parts and also on some of the smallest Spartans with equally good results.

That said, a lot of what Chipscope does can be done independently. Digilent has some fairly comprehensive tools for controlling designs through the JTAG port with GUIs running on the host PC. Definitely worth checking out. There was also a good article in the Xilinx XCELL magazine a few years ago about an open-source tool much like Chipscope, but the source for that has unfortunately disappeared.

Eric

- Raw text -