Mail Archives: geda-user/2012/10/21/17:54:56
DJ Delorie wrote:
:
: What I do is split MCUs up into functional blocks - one block for all
: the power/gnd pins, one for ISP, one for external memory bus, etc.
: Then you can fiddle with block variants on a per-project basis.
:
: As for design-specific pin functions, what I do is leave the symbol's
: pin named according to what the mcu's documentation uses, so that I
: can remember what pin it "is" according to the mcu. Then I label the
: net coming out of that pin right at the pin, with its design-specific
: purpose.
:
: So, a pin that's GPIO port 9 bit 4, that's TxD3, that I happen to be
: using for the console, might be named P94/TxD3 with the net named
: CONSOLE_TX.
Naming nets instead of pins seems reasonable, thanks! There is
a problem wrt. my design with this approach, though: some pins of the MCU
are used for programming as well as for other purposes. For example,
one pin is used as clock input when downloading the firmware, and as
a PWM output in normal operation. So I want the programming connector
pin to be labeled "clock", but the whole net (maybe including
the MCU pin) should be labeled "PWM 1" or something like that.
IOW, I want the "clock" label to be visible somewhere near the
connector pin (both in the schematics and in the PCB silk layer),
and the label "PWM 1" visible near the CPU pin. How do you suggest to
handle multi-purpose nets/pins?
-Yenya
--
| Jan "Yenya" Kasprzak <kas at {fi.muni.cz - work | yenya.net - private}> |
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| http://www.fi.muni.cz/~kas/ Journal: http://www.fi.muni.cz/~kas/blog/ |
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