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Date:	Mon, 12 Mar 2012 15:12:31 -0400
From:	Dave McGuire <mcguire AT neurotica DOT com>
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To:	geda-user AT delorie DOT com
Subject:	Re: [geda-user] Very confused...possible PCB bug? Need help.
References:	<4F5DCE76 DOT 1060304 AT neurotica DOT com> <201203121526 DOT q2CFQgFn006867 AT envy DOT delorie DOT com>
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Reply-To:	geda-user AT delorie DOT com

On 03/12/2012 11:26 AM, DJ Delorie wrote:
> Possible things to check for...
>
> Thermal flag set on a pin that's not over the rectangle, so you don't
> know it thinks it's connected

   Do you mean a thermal flag that has nothing to "be a thermal to"?  If 
so, I can check for that.

> Tiny "stub" trace with the join (j) flag set, hidden under a pin

   Unless it's so tiny as to be invisible (literally), this isn't it; 
I've audited all pins, pads, and vias individually for stubs.  Good idea 
though!

> trace with join flag, in a place where the polygon is otherwise cleared out

   Now this I haven't looked for...will check for it now.

> Try deleting one of the two plane polygons, see which one makes the
> problem go away.  That might at least narrow it down to one layer.

   I deleted both of them; that doesn't get rid of the short.  That's 
one of the things about this that's so confusing.

   Someone mentioned "the zero-length trace problem" in private email; 
what's up with that?  I haven't googled it yet but I will in a moment.

   Thank you for your suggestions.  I'm getting back to it now.

              -Dave

-- 
Dave McGuire, AK4HZ
New Kensington, PA

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