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Mail Archives: geda-help/2015/08/30/01:11:25

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Date: Sun, 30 Aug 2015 07:13:42 +0200 (CEST)
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To: "Stan Katz (stan DOT katz DOT hk AT gmail DOT com) [via geda-help AT delorie DOT com]" <geda-help AT delorie DOT com>
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From: gedah AT igor2 DOT repo DOT hu
Subject: Re: [geda-help] General PCB Layout Question on Two Layer Board
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On Sun, 30 Aug 2015, Stan Katz (stan DOT katz DOT hk AT gmail DOT com) [via geda-help AT delo=
rie.com] wrote:

<snip>
> Lucky for me, pcb-rnd didn't segfault.

This may mean a regression in the mainline version since the fork. Sharing=
=20
your pcb and/or backtraces of the crash may help mainline developers to=20
fix it.

>The trace colors were also
>nicely saturated, and easier on my old eyes. Give Igor2 one thumbs up from=
 a
>rank amateur hobbyist....for what that's worth.=C2=A0

Thank you! I think the effect on the colors is related to (the lack of)=20
opengl/transparency support in pcb-rnd. At last, I'm not the only one with=
=20
old eyes.

Sorry, I can't help with the two layer question; I've read some books on=20
signal integrity lately (different domain: high speed digital), and that=20
also said it was very hard to achieve good results without a solid=20
ground plane, so it was more into 4+ layers too.

As a hobbyst, I also build PCBs a lot at home using toner transfer; I was=
=20
considering building 4 layer boards: I can buy 1 and 2 layer laminates of=
=20
0.8 mm. I'd use a 0.8mm 2 layer board with a Vcc and a GND layer in the=20
middle. I'd solder in short pins in all vias. I'd then roll two 0.8mm=20
single sided boards for the outer layers and just sandwich them all. There=
=20
are some drawbacks, tho:

- I'd probably need to come up with some special method for preparing the=
=20
middle board: printing an almost fully black page with only the=20
unconnected vias having white rings sounds suboptimal

- solder cones on the middle layers would require the back of outer layers=
=20
to be drilled with some larger drills to a few tenth of mm... currently=20
drilling is one of the most time consuming step of the process even with a=
=20
single layer board

- once i find there's a soldering problem on the inner layer, I'm doomed.

Regards,

Igor2
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