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Subject: | Re: [geda-help] using net names on multiple sub schematics used by |
single symbol | |
To: | geda-help AT delorie DOT com |
References: | <c6376b29-a72c-6ae0-1b39-081ecb97ec1c AT gmx DOT de> |
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From: | "Klaus Rudolph (lts-rudolph AT gmx DOT de) [via geda-help AT delorie DOT com]" <geda-help AT delorie DOT com> |
Message-ID: | <b7d591b9-9f89-4ec6-4115-72608dec59f4@gmx.de> |
Date: | Sat, 12 Dec 2020 15:11:08 +0100 |
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Am 12.12.20 um 13:00 schrieb Roland Lutz: > On Sat, 12 Dec 2020, Klaus Rudolph (lts-rudolph AT gmx DOT de) [via > geda-help AT delorie DOT com] wrote: >>> That's still valid, but I agree that it would be a good idea to >>> update these resources to use the newer convention. >> >> ... and maybe add a "deprecated" warning while processing these kind of >> schematics? OK > > Using refdes= for ports isn't deprecated because there are some things > which can't be achieved with a portname= attribute, like having a > component be a port in some situations and a connector in others. No idea what that really means... > >> No! I want an explicit access on the namespace. Every level of hierarchy >> should be seen as local, but each of these level should be in some way >> *explicit* addressable but giving additional information in some syntax >> to the name of the net. Something like net=<upper>#<some_net_name> or >> "net=<global>#<some_net_name> " whatever syntax you like. > > But that's exactly what I/O ports are for! So you want to have an > "invisible pin" on the subschematic symbol which connects to a named > net, and an "invisible port symbol" inside the subschematic which > connects the port to a local net? I didn't know how to achieve this. I have no idea how to create a symbol with has less pins but can connect to a sub schematic. I only know how to do it with a pin. > >> But it would be nice if buses can be used as nets. Connecting them via >> a element ( maybe a pin ) may connect the whole bus to the sub >> schematic. If you have a design with some address and data bus and you >> can simply connect all your sub schematic peripherals with the pins >> would be nice. I am currently did not have such jobs to realize, but >> it looks "natural" to me. > > I have already implemented that as part of my (at the time) experimental > netlister features, but I haven't merged it yet, mostly because of > different conflicting conventions for pin numbering. > > What pin numbering scheme do you use? Sorry, no idea what that means? All symbols I noticed have pinnumber and pinsequence the same value. Is it something related to that? Klaus
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