Mail Archives: geda-help/2019/10/20/14:53:16
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| Sun, 20 Oct 2019 11:37:40 -0700 (PDT)
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| Date: | Sun, 20 Oct 2019 18:37:18 +0000
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| From: | "John L. Males (jlmales AT gmail DOT com) [via geda-help AT delorie DOT com]" <geda-help AT delorie DOT com>
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| To: | geda-help AT delorie DOT com
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| Subject: | Re: [geda-help] Question: New User - How To Create Very Simple
|
| Unique PCB With No Components
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| Organization: | Toronto, Ontario
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-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
Hello Chad,
Thank you for your reply.
I have looked about at different PCB board manufactures to see
what board thicknesses are offered. There are some that that
do offer the about 0.79mm board thickness. Would you think fir
FR4 0.78mm thickness with a 1.5"x2.5" copper plane could result
in a capacitance of about 27pF - 39pF due to FR4 as dielectric
and temperature variations? I am asking if you think that
kind of variation between FR4 dielectric and temperature
may seen reasonable for such a given area of copper top and
bottom.
Very helpful suggestion that Polyimide is more stable dielectric
and less sensitive to temperature. I like both attributes very
much for repeatability for each build I do. I am assuming less
sensitive to temperature means less sensitive and less
variability to temperature delta changes as well.
I like the suggestion of smaller traces with connecting traces
that can be broken to fine tune. That could enable me to
match board capacitance for each build. One question I have is
for instances where I cut small connecting trace(s) to the
larger trace areas would these disconnected traces have an
effect on capacitance for example being in close proximity to
the the traces being read actively? I am asking as this may
need to be factored into the size, number, and how the smaller
traces are configured. I would think some experimenting
would likely be needed for the smaller traces approach to
determine what makes sense for the application.
I have been experimenting with PCB prior to and since my last
post. One of those was drawing rectangles for the the
(predefined) top and bottom layer. I was trying to find how
to fill those rectangular areas with no success in finding.
Based on what you say it sounds like drawing a rectangle is
actually drawing an area of copper. Is that correct? If so I
have the start of a board design without ever knowing. I had
not added holes needed to prevent air resistance of the plates
that will move above and below the capacitance sensing PCB board
I am trying to design. It sounds like I could add the air
holes, then work on how to extend traces from the top and
bottom copper planes to solder pads on top side of the PCB.
Application voltage is well below 25V so the soldermask
suggestion as insulation to allow this to just be a two layer
board is great. There is no rubbing involved in the
application for the capacitance PCB that sits between the gap
of the top and bottom moving plates. Does one specify the
soldermask in the PCB design or doe one tell the PCB
manufacturer a soldermask is required like one advises the PCB
manufacturer of the PCB thickness required?
I am not sure that thermals will be needed. The voltage and
sampling time of the circuit that senses the capacitance change
due to the moving plates he capacitance PCB sits between I
do not believe there will heat issues for the copper areas
of the capacitance sensing PCB. The application cannot have
any heat related issues as the circuit reading the delta
capacitance change due to the plate movement is designed. The
application would not function for the intent of the application
if there were heat related issues from the application. The only
thermal consideration is providing a stable environment for the
completed application the capacitance sensor PCB is part of
as this standard practice no matter the type of design
(capacitance based or not) for the application.
Assuming I have already created the copper on top and bottom of
the PCB without knowing I really had via the rectangle tool I
will see if I can complete the other elements of the PCB
design. I still like to know if I had unknowing created the
copper area on top and bottom of the PCB as I asked above.
If I have any questions I will ask. If I manage to create
the capacitance PCB using the initial all one piece of
copper I will then try making a variation of it using
smaller copper areas with small traces that can be cut to
fine tune the capacitance of the PCB.
John L. Males
Toronto, Ontario
Canada
20 October 2019 14:37 -0400 EDT
================================================================
2019-10-20 17:36:41+0000-UTC Time: 1571593001 PC/System time
20 Oct 17:36:41 ntpdate[9545]: ntpdate 4.2.8p12-a (1)
20 Oct 17:36:56 ntpdate[11204]: step time server 206.108.0.133
offset 0.008545 sec
FreeBSD 11.3-STABLE FreeBSD 11.3-STABLE #0 r349903: Thu Jul 11
16:13:47 UTC 2019
root AT releng2 DOT nyi DOT freebsd DOT org:/usr/obj/usr/src/sys/GENERIC
(Work in progress alternative to Linux Kernel of its own right,
Debian, and
other Linux based Kernel distributions determined.)
Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz
Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz (1396.86-MHz K8-class
CPU) Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz (1396.86-MHz
K8-class CPU) Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz
(1396.86-MHz K8-class CPU) Intel(R) Core(TM) i3-2367M CPU @
1.40GHz (1396.86-MHz K8-class CPU) Intel(R) Core(TM) i3-2367M
CPU @ 1.40GHz (1396.86-MHz K8-class CPU)
dev.cpu.0.temperature: 57.0C
dev.cpu.1.temperature: 57.0C
dev.cpu.2.temperature: 55.0C
dev.cpu.3.temperature: 54.0C
hw.acpi.thermal.tz0.temperature: 56.1C
vmstat -s:
395530 cpu context switches
44489 device interrupts
7414 software interrupts
511510 traps
27272159 system calls
27 kernel threads created
1717 fork() calls
321 vfork() calls
0 rfork() calls
0 swap pager pageins
0 swap pager pages paged in
0 swap pager pageouts
0 swap pager pages paged out
4376 vnode pager pageins
48664 vnode pager pages paged in
3 vnode pager pageouts
3 vnode pager pages paged out
0 page daemon wakeups
27387 pages examined by the page daemon
0 clean page reclamation shortfalls
0 pages reactivated by the page daemon
78922 copy-on-write faults
432 copy-on-write optimized faults
239305 zero fill pages zeroed
0 zero fill pages prezeroed
8 intransit blocking page faults
542043 total VM faults taken
4137 page faults requiring I/O
0 pages affected by kernel thread creation
70678 pages affected by fork()
11388 pages affected by vfork()
0 pages affected by rfork()
443839 pages freed
0 pages freed by daemon
115601 pages freed by exiting processes
74490 pages active
45795 pages inactive
0 pages in the laundry queue
92946 pages wired down
1794500 pages free
4096 bytes per page
297661 total name lookups
cache hits (88% pos + 5% neg) system 0% per-directory
deletions 0%, falsehits 0%, toolong 0%
Boot time : 1571592669
procs memory page disks
faults cpu0 cpu1 cpu2 cpu3 r b w avm
fre flt re pi po fr sr ad0 pa0 in sy cs us sy
id us sy id us sy id us sy id 0 0 0 2413800 7177940 1565 0
13 0 1281 79 0 0 128 78596 1140 4 6 90 4 6 91
4 6 89 4 6 90
memory info:
real memory = 8589934592 (8192 MB)
avail memory = 8166465536 (7788 MB)
last pid: 20565; load averages: 0.35, 0.30, 0.15 up
0+00:05:48 17:36:57 44 processes: 2 running, 42 sleeping
Mem: 292M Active, 179M Inact, 363M Wired, 85M Buf, 7009M Free
Swap: 48G Total, 48G Free
hw.physmem: 8463925248
hw.usermem: 8083009536
hw.realmem: 8589934592
total used free shared
buffers cached Mem: 8030732 669720
7361012 0 0 0 Swap:
50331644 0 50331644
swapinfo:
Device 1K-blocks Used Avail Capacity
/dev/ada0s1b 50331644 0 50331644 0%
vmstat:
procs memory page disks
faults cpu r b w avm fre flt re pi po
fr sr ad0 pa0 in sy cs us sy id 0 0 0 2413848 7177620
1568 0 13 0 1284 79 0 0 129 78391 1142 4 6 90
Message replied to:
Date: Sun, 20 Oct 2019 12:14:36 -0400
From: "Chad Parker (parker DOT charles AT gmail DOT com) [via
geda-help AT delorie DOT com]" <geda-help AT delorie DOT com> To:
geda-help AT delorie DOT com Subject: Re: [geda-help] Question: New
User - How To Create Very Simple Unique PCB With No Components
> Hi John-
>
> If the board thickness is important to you, you'll definitely
> want to talk to the manufacturer before they build it. Most
> shops (well, some at least) have a variety of different
> thickness substrates that they can use. You'll want to have a
> chat with their manufacturing engineer to see what options
> are available. Then if the capacitance value is important to
> you, you will likely need to tailor your copper area to fine
> tune it to whatever thickness they can provide.
>
> Depending on how much variation you can tolerate, there are
> several other thing you can consider.
>
> As Erich points out, FR4 is not a particularly consistent
> dielectric. You may want to try something like Polyimide that
> is more consistent and less sensitive to temperature.
>
> You could also consider breaking your large area into
> segments connected by small traces. Build in extra area so
> the capacitance is greater than you want, and then you can
> tune it down by cutting some of those connecting traces to
> reduce the effective area. These extra areas could be large
> or small depending on how much tuning you want to do.
>
> You can do all of these things quite easily in pcb. Use the
> rectangle tool to draw your copper areas on the top and
> bottom layers. Your holes can be created using the pin/via
> tool, with a copper area that's smaller than the drill size.
> If you want holes that aren't circular, then you can draw
> outlines of those shapes on the outline layer using the line
> and arc tools.
>
> If your application doesn't have anything that is rubbing on
> the PCB, then soldermask is an effective insulator at low
> voltages (maybe, say, < 25 V?). You wouldn't have to bother
> with a third layer.
>
> To make connections, you can just add two pins and connect
> one to each of the two planes. You'll definitely want to use
> thermals as those large copper areas will sink a lot of heat.
> Select the thermal tool and click the pin. Then you can cycle
> through different connectivity options by holding one of the
> modifier keys and clicking again (I think it's <shift> off
> the top of my head).
>
> Let me know if you have any trouble.
> --Chad
>
>
> On Fri, Oct 18, 2019 at 11:06 PM Erich Heinzle
> (a1039181 AT gmail DOT com) [via geda-help AT delorie DOT com]
> <geda-help AT delorie DOT com> wrote:
>
> > A few thoughts...
> >
> > The characteristics of FR4 can vary depending on
> > temperature, humidity and frequency of operation.
> >
> > The manufacturer may not be able to do the exact thickness
> > you need.
> >
> > Yes, a via would allow connection to copper on the
> > underside to tracks on the top layer
> >
> > Regards,
> >
> > Erich
> >
> > On Sat, 19 Oct 2019 12:55 John L. Males (jlmales AT gmail DOT com)
> > [via geda-help AT delorie DOT com], <geda-help AT delorie DOT com> wrote:
> >
> >> -----BEGIN PGP SIGNED MESSAGE-----
> >> Hash: SHA1
> >>
> >> Eric,
> >>
> >> Thanks for your reply.
> >>
> >> I hope I am replying in the correct manner for the mailing
> >> list.
> >>
> >> I left out some elements on purpose not aware of possible
> >> suggestion to stack the PCBs.
> >>
> >> I cannot stack two PCBs for thickness reasons that are
> >> actually specific for the this simple PCB board. The
> >> thickness of the board will need to be about 0.79mm. As
> >> indicated PCB thickness is specified when board is made
> >> and not in the PCB software.
> >>
> >> I thought is would be simple to have a copper plane on both
> >> sides of board and to include holes in this simple PCB.
> >> The simple PCB board is a capacitor based on copper
> >> surface area minus the holes that need to be there to
> >> allow air to freely move due to the plates on either side
> >> of the simple PCB I want to make. The PCB I want to make
> >> needs a 0.79mm gap between the two copper planes of the
> >> PCB, ergo a PCB thickness of about 0.79mm.
> >>
> >> The copper area will be about the middle 80% (off top of my
> >> head). I have not calculated the exact surface area of the
> >> two copper planes yet. The minimum board span will be 4
> >> inches minus about 1.25 inches for the combined sides the
> >> board is mounted on and the gap of the moving plates this
> >> PCB will be sandwiched between.
> >>
> >> I indicated minimum board span as I may want to add about
> >> 0.75 inches to one side of the PCB length to overhang on
> >> one side of the span points. This to allow easy access
> >> and clearance for connectors if I choose to design for
> >> connectors. A soldered to board wires via solder pads
> >> that will not need any board overhang.
> >>
> >> In essence I need two layers, but thought it might be
> >> useful for third layer that runs inside the board that
> >> brings traces out from each copper plane. The intent was
> >> to make it easy for the lead out traces not to short on
> >> the aluminum block at the end where the connections are
> >> made to the PCB via wires or connectors.
> >>
> >> Maybe I have to consider adding thin coat of varathane to
> >> insulate the lower trace to a top trace transition for
> >> connection of wires via pad or connectors. The top side
> >> of the board is not in contact with any metal. Might that
> >> present a way to transition the lower plane of copper to
> >> an upper trace? Is a via the correct term/approach to
> >> allow? I can ensure the is a bit of gap and enough
> >> clearance from the aluminum mounting block for a via or
> >> what it needed to transition a bottom trace/copper to
> >> upper trace for solder pad or connector.
> >>
> >> If it is useful I could see if I can create an image of
> >> both sides of board with a drawing program. I am not
> >> certain if I can, but I can see if that helps clarify my
> >> attempt to articulate what I am trying to do.
> >>
> >>
> >> John L. Males
> >> Toronto, Ontario
> >> Canada
> >> 18 October 2019 22:00 -0400 EDT
> >>
> >>
> >> ================================================================
> >>
> >> 2019-10-19 01:25:11+0000-UTC Time: 1571448311 PC/System
> >> time
> >>
> >> 19 Oct 01:25:11 ntpdate[15820]: ntpdate 4.2.8p12-a (1)
> >>
> >> 19 Oct 01:25:26 ntpdate[17068]: step time server
> >> 206.108.0.132 offset 0.001708 sec
> >>
> >> FreeBSD 11.3-STABLE FreeBSD 11.3-STABLE #0 r349903: Thu
> >> Jul 11 16:13:47 UTC 2019
> >> root AT releng2 DOT nyi DOT freebsd DOT org:/usr/obj/usr/src/sys/GENERIC
> >>
> >> (Work in progress alternative to Linux Kernel of its own
> >> right, Debian, and
> >> other Linux based Kernel distributions determined.)
> >>
> >> Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz
> >> Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz (1396.86-MHz
> >> K8-class CPU) Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz
> >> (1396.86-MHz K8-class CPU) Intel(R) Core(TM) i3-2367M CPU
> >> @ 1.40GHz (1396.86-MHz K8-class CPU) Intel(R) Core(TM)
> >> i3-2367M CPU @ 1.40GHz (1396.86-MHz K8-class CPU) Intel(R)
> >> Core(TM) i3-2367M CPU @ 1.40GHz (1396.86-MHz K8-class CPU)
> >>
> >> dev.cpu.0.temperature: 69.0C
> >> dev.cpu.1.temperature: 68.0C
> >> dev.cpu.2.temperature: 64.0C
> >> dev.cpu.3.temperature: 64.0C
> >> hw.acpi.thermal.tz0.temperature: 69.1C
> >>
> >> vmstat -s:
> >>
> >> 188317092 cpu context switches
> >> 7044759 device interrupts
> >> 1014980 software interrupts
> >> 51267914 traps
> >> 479658084 system calls
> >> 27 kernel threads created
> >> 3253 fork() calls
> >> 1051 vfork() calls
> >> 0 rfork() calls
> >> 0 swap pager pageins
> >> 0 swap pager pages paged in
> >> 0 swap pager pageouts
> >> 0 swap pager pages paged out
> >> 8798 vnode pager pageins
> >> 122396 vnode pager pages paged in
> >> 322 vnode pager pageouts
> >> 3527 vnode pager pages paged out
> >> 11 page daemon wakeups
> >> 29799537 pages examined by the page daemon
> >> 0 clean page reclamation shortfalls
> >> 369964 pages reactivated by the page daemon
> >> 528547 copy-on-write faults
> >> 9933 copy-on-write optimized faults
> >> 33166324 zero fill pages zeroed
> >> 25991 zero fill pages prezeroed
> >> 1622 intransit blocking page faults
> >> 52124252 total VM faults taken
> >> 12676 page faults requiring I/O
> >> 0 pages affected by kernel thread creation
> >> 373301 pages affected by fork()
> >> 36978 pages affected by vfork()
> >> 0 pages affected by rfork()
> >> 37526757 pages freed
> >> 308705 pages freed by daemon
> >> 17242344 pages freed by exiting processes
> >> 473888 pages active
> >> 1014069 pages inactive
> >> 208348 pages in the laundry queue
> >> 250554 pages wired down
> >> 60872 pages free
> >> 4096 bytes per page
> >> 3737378 total name lookups
> >> cache hits (93% pos + 4% neg) system 0%
> >> per-directory deletions 0%, falsehits 0%, toolong 0%
> >>
> >> Boot time : 1571414099
> >>
> >> procs memory page disks
> >> faults cpu0 cpu1 cpu2 cpu3 r b w avm
> >> fre flt re pi po fr sr ad0 pa0 in sy cs
> >> us sy id us sy id us sy id us sy id 0 0 0 32149200 243428
> >> 1523 11 0 0 1096 871 0 0 206 14014 5502 11 7
> >> 82 12 4 84 12 3 84 12 3 84
> >>
> >> memory info:
> >>
> >> real memory = 8589934592 (8192 MB)
> >> avail memory = 8166465536 (7788 MB)
> >>
> >> last pid: 23225; load averages: 1.41, 0.92, 0.69 up
> >> 0+09:30:27 01:25:26 60 processes: 1 running, 59
> >> sleeping
> >>
> >> Mem: 1852M Active, 3961M Inact, 814M Laundry, 979M Wired,
> >> 510M Buf, 237M Free Swap: 48G Total, 48G Free
> >>
> >> hw.physmem: 8463925248
> >> hw.usermem: 7437496320
> >> hw.realmem: 8589934592
> >>
> >> total used free shared
> >> buffers cached Mem: 8030732 3731096
> >> 4299636 0 0 0 Swap:
> >> 50331644 0 50331644
> >>
> >> swapinfo:
> >>
> >> Device 1K-blocks Used Avail Capacity
> >> /dev/ada0s1b 50331644 0 50331644 0%
> >>
> >> vmstat:
> >>
> >> procs memory page disks
> >> faults cpu r b w avm fre flt re pi po
> >> fr sr ad0 pa0 in sy cs us sy id 0 0 0 32149200
> >> 243400 1523 11 0 0 1096 871 0 0 206 14014
> >> 5502 12 4 84
> >>
> >>
> >> Message replied to:
> >>
> >> Date: Sat, 19 Oct 2019 11:12:00 +1030
> >> From: "Erich Heinzle (a1039181 AT gmail DOT com) [via
> >> geda-help AT delorie DOT com]" <geda-help AT delorie DOT com> To:
> >> "Vladimir Zhbanov (vzhbanov AT gmail DOT com) [via
> >> geda-help AT delorie DOT com]" <geda-help AT delorie DOT com> Subject:
> >> Re: [geda-help] Question: New User - How To Create Very
> >> Simple Unique PCB With No Components
> >>
> >>
> >> > The PCB thickness is usually selected at the time of
> >> > ordering the board from the manufacturer.
> >> >
> >> > Routine FR4 is 1.6mm thick, with 1 or 2 oz per square
> >> > foot of copper for the front and back planes.
> >> >
> >> > The next option up from double sided is 4 layer boards,
> >> > which are quite a bit more expensive.
> >> >
> >> > My approach to your board stack up would be to make two
> >> > double sided boards which have fairly full copper
> >> > coverage on their bottom layers and then get stacked one
> >> > on top of the other, with the full copper planes
> >> > outermost. You can then make any holes in the two boards
> >> > correspond for all the way through perforations, or not,
> >> > for part way perforations into the middle layer(s)
> >> > section for access to any trackwork.
> >> >
> >> > Attention to registration marks, (maybe using some drill
> >> > holes for mountung hardware for this) would be important.
> >> >
> >> > Apertures on a board are defined with the outline layer,
> >> > and need to take account of a milling cutter's typically
> >> > 0.8mm diameter, and the centres of the lines on the
> >> > outline layer for apertures define the path of the
> >> > cutter's outer radius.
> >> >
> >> > If you need slots, or windowing of solder mask layers,
> >> > it may be easier to do the board in pcb-rnd, which
> >> > supports slots, as well as arbitrary negative apertures
> >> > on the solder mask layer, which may be necessary,
> >> > depending on your plans for exposure of the inner and
> >> > outer layer copper areas.
> >> >
> >> > You could do most of the above as a four layer board, by
> >> > censoring/eliminating one of the internal layers, but
> >> > you may be paying a lot to do this, and may struggle to
> >> > get the openings you want communicated effectively to
> >> > the board fabricator.
> >> >
> >> > Regards,
> >> >
> >> > Erich
> >> >
> >> > On Sat, 19 Oct 2019 09:34 John L. Males
> >> > (jlmales AT gmail DOT com) [via geda-help AT delorie DOT com],
> >> > <geda-help AT delorie DOT com> wrote:
> >> >
> >> > > -----BEGIN PGP SIGNED MESSAGE-----
> >> > > Hash: SHA1
> >> > >
> >> > > Hello,
> >> > >
> >> > > This is my first posting here. I do not know if the
> >> > > mailing list will automatically eMail me a reply. I
> >> > > have looked at the mailing list commands and options I
> >> > > cannot find if and how I may set if replies to me or
> >> > > others can be set.
> >> > >
> >> > > I am new to PCB software, but have reasonable average
> >> > > electronics skills over a number of years.
> >> > >
> >> > > I have a simple and unique challenge I have tried many
> >> > > different ways to figure out. I have done alot of
> >> > > internet searching, looked at many tutorials, and
> >> > > tried using PCB based on tutorials and my own
> >> > > exploring about PCB to find how I do this simple and
> >> > > unique PCB.
> >> > >
> >> > > I need to create a PCB that has a copper plane on top
> >> > > and bottom of the PCB. That simple. No components.
> >> > > It is likely via a third layer between the top and
> >> > > bottom copper planes I will want traces out to holes I
> >> > > may make as solder tabs or us a connector of some
> >> > > type. The reason for the trace connections as a third
> >> > > layer is to ensure the traces do not short with the
> >> > > aluminum parts metal part the PCB has to be mounted to
> >> > > directly at each end of the PCB.
> >> > >
> >> > > Then I will need to create a set of holes in the
> >> > > parallel copper planes area whose sole purpose is to
> >> > > let air pass between and not be a connection between
> >> > > the top and bottom copper planes.
> >> > >
> >> > > If I need to specify a PCB thickness then how I do
> >> > > so. So far I have not been able to find a
> >> > > setting/preference for the PCB thickness to do so.
> >> > >
> >> > > The how to do the connector and/or solder tab is not
> >> > > critical to the primary question. I will try to figure
> >> > > that out after I have the most important part of the
> >> > > PCB as noted above done in PCB.
> >> > >
> >> > > I will need to do a second PCB, but it will have lots
> >> > > of components on it. I would need to enter the
> >> > > schematic first of curse. I suspect I will manage with
> >> > > the help examples I have already read and will read
> >> > > again when I am ready to create a PCB from the
> >> > > schematic.
> >> > >
> >> > > If there is any missing part of the information to my
> >> > > core question of copper planes on top/bottom and holes
> >> > > in the copper plane that do not connect the top and
> >> > > bottom copper planes feel free to ask or comment on.
> >> > >
> >> > >
> >> > > John L. Males
> >> > > Toronto, Ontario
> >> > > Canada
> >> > > 18 October 2019 18:38 -0400 EDT
> >> > >
> >> > >
> >> > > ================================================================
> >> > >
> >> > > 2019-10-18 22:05:20+0000-UTC Time: 1571436320
> >> > > PC/System time
> >> > >
> >> > > 18 Oct 22:05:20 ntpdate[85789]: ntpdate 4.2.8p12-a (1)
> >> > >
> >> > > 18 Oct 22:05:35 ntpdate[87775]: step time server
> >> > > 206.108.0.131 offset -0.004716 sec
> >> > >
> >> > > FreeBSD 11.3-STABLE FreeBSD 11.3-STABLE #0 r349903:
> >> > > Thu Jul 11 16:13:47 UTC 2019
> >> > > root AT releng2 DOT nyi DOT freebsd DOT org:/usr/obj/usr/src/sys/GENERIC
> >> > >
> >> > > (Work in progress alternative to Linux Kernel of its
> >> > > own right, Debian, and
> >> > > other Linux based Kernel distributions determined.)
> >> > >
> >> > > Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz
> >> > > Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz (1396.86-MHz
> >> > > K8-class CPU) Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz
> >> > > (1396.86-MHz K8-class CPU) Intel(R) Core(TM) i3-2367M
> >> > > CPU @ 1.40GHz (1396.86-MHz K8-class CPU) Intel(R)
> >> > > Core(TM) i3-2367M CPU @ 1.40GHz (1396.86-MHz K8-class
> >> > > CPU) Intel(R) Core(TM) i3-2367M CPU @ 1.40GHz
> >> > > (1396.86-MHz K8-class CPU)
> >> > >
> >> > > dev.cpu.0.temperature: 71.0C
> >> > > dev.cpu.1.temperature: 70.0C
> >> > > dev.cpu.2.temperature: 66.0C
> >> > > dev.cpu.3.temperature: 66.0C
> >> > > hw.acpi.thermal.tz0.temperature: 72.1C
> >> > >
> >> > > vmstat -s:
> >> > >
> >> > > 128476253 cpu context switches
> >> > > 4928508 device interrupts
> >> > > 661878 software interrupts
> >> > > 41825629 traps
> >> > > 346413636 system calls
> >> > > 27 kernel threads created
> >> > > 3000 fork() calls
> >> > > 793 vfork() calls
> >> > > 0 rfork() calls
> >> > > 0 swap pager pageins
> >> > > 0 swap pager pages paged in
> >> > > 0 swap pager pageouts
> >> > > 0 swap pager pages paged out
> >> > > 8688 vnode pager pageins
> >> > > 120478 vnode pager pages paged in
> >> > > 322 vnode pager pageouts
> >> > > 3527 vnode pager pages paged out
> >> > > 3 page daemon wakeups
> >> > > 19153450 pages examined by the page daemon
> >> > > 0 clean page reclamation shortfalls
> >> > > 198910 pages reactivated by the page daemon
> >> > > 502073 copy-on-write faults
> >> > > 9226 copy-on-write optimized faults
> >> > > 27520777 zero fill pages zeroed
> >> > > 24413 zero fill pages prezeroed
> >> > > 1622 intransit blocking page faults
> >> > > 42301697 total VM faults taken
> >> > > 12576 page faults requiring I/O
> >> > > 0 pages affected by kernel thread creation
> >> > > 357307 pages affected by fork()
> >> > > 28026 pages affected by vfork()
> >> > > 0 pages affected by rfork()
> >> > > 30941382 pages freed
> >> > > 89018 pages freed by daemon
> >> > > 13777017 pages freed by exiting processes
> >> > > 470801 pages active
> >> > > 1014759 pages inactive
> >> > > 191320 pages in the laundry queue
> >> > > 234660 pages wired down
> >> > > 96191 pages free
> >> > > 4096 bytes per page
> >> > > 3108988 total name lookups
> >> > > cache hits (93% pos + 4% neg) system 0%
> >> > > per-directory deletions 0%, falsehits 0%, toolong 0%
> >> > >
> >> > > Boot time : 1571414099
> >> > >
> >> > > procs memory page disks
> >> > > faults cpu0 cpu1 cpu2 cpu3 r b
> >> > > w avm fre flt re pi po fr sr ad0 pa0
> >> > > in sy cs us sy id us sy id us sy id us sy id 0 0
> >> > > 0 31449076 384704 1902 9 0 0 1391 861 0 0
> >> > > 222 15578 5778 12 8 80 14 4 82 14 4 82 14 4 82
> >> > >
> >> > > memory info:
> >> > >
> >> > > real memory = 8589934592 (8192 MB)
> >> > > avail memory = 8166465536 (7788 MB)
> >> > >
> >> > > last pid: 92816; load averages: 0.46, 0.66, 0.83
> >> > > up 0+06:10:37 22:05:36 56 processes: 1 running, 55
> >> > > sleeping
> >> > >
> >> > > Mem: 1840M Active, 3964M Inact, 747M Laundry, 917M
> >> > > Wired, 474M Buf, 375M Free Swap: 48G Total, 48G Free
> >> > >
> >> > > hw.physmem: 8463925248
> >> > > hw.usermem: 7502598144
> >> > > hw.realmem: 8589934592
> >> > >
> >> > > total used free shared
> >> > > buffers cached Mem: 8030732 3587088
> >> > > 4443644 0 0 0 Swap:
> >> > > 50331644 0 50331644
> >> > >
> >> > > swapinfo:
> >> > >
> >> > > Device 1K-blocks Used Avail Capacity
> >> > > /dev/ada0s1b 50331644 0 50331644 0%
> >> > >
> >> > > vmstat:
> >> > >
> >> > > procs memory page disks
> >> > > faults cpu r b w avm fre flt re pi
> >> > > po fr sr ad0 pa0 in sy cs us sy id 1 0 0
> >> > > 31449076 384420 1902 9 0 0 1392 861 0 0
> >> > > 222 15579 5778 14 5 82
> >> > >
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