delorie.com/archives/browse.cgi | search |
X-Authentication-Warning: | delorie.com: mail set sender to geda-help-bounces using -f |
X-Recipient: | geda-help AT delorie DOT com |
X-Original-DKIM-Signature: | v=1; a=rsa-sha256; c=relaxed/relaxed; |
d=gmail.com; s=20120113; | |
h=mime-version:in-reply-to:references:from:date:message-id:subject:to; | |
bh=M5383dDqFr5udUjsJyWZuDs+pvG95SjCErOcd5fyfUM=; | |
b=IyPmxB7xKeEFV95LmGl6BSHutqM4hHakLS3EcsQOU148mWLOY3rVPoLuiiJnmqfdo9 | |
La1b1OVVOwWN93tYGn/6DZNj/mkgSJdC/yKnK7oZKhutEFdBKap4GIsnmi1HcPW9W1GT | |
42MlX9mlu7c8pUfD6eV/omxh6sTLzHrDMM9i6/RIEFw/dwW724f1aSykTWQQJiMZWRX+ | |
aoGpkp+v6InUXRuCQEWH2ANLzLLoFKEf2OqtB86ddFQZT7f9+tsYZhFR4IMs7w/VtsC0 | |
giYCFkpEXADKE/wEZoqvuDIS7w6NtbAeZZUfnzNh4Y1K2EF9dFalHQG54TX/NAWCxRNs | |
4swA== | |
X-Google-DKIM-Signature: | v=1; a=rsa-sha256; c=relaxed/relaxed; |
d=1e100.net; s=20130820; | |
h=x-gm-message-state:mime-version:in-reply-to:references:from:date | |
:message-id:subject:to; | |
bh=M5383dDqFr5udUjsJyWZuDs+pvG95SjCErOcd5fyfUM=; | |
b=WoWCa81NVDhPL9zW/dvdkC2ZOA6EP2octKhixZ5wjyyYlybAPt/Ovkks7PmVwJ+6qT | |
DwSpZ7wsCHUv/JnFyw9EWO5V7KB71IGpKdtlZe3R2KRipOevLb5+GVuFZfEZmcN4gOCU | |
TSv7ULNWyBvgl6E9lkcUcDGV2R5FwUzavbhEqq3uuFKcqrrXuyQYv15OEhw0GzsjqunX | |
vu6TjdUPn18r1dfZf2NaAV9pzUe5gXiu3piBLknikiEuAiH9dYLnQmyag2eT2t4GFBbP | |
UPNmmFq4r63IV0KqCFYsEdVAObtUnl7krzMG5Gjs/AnGpoVFCW9j8qSxSwA+0z3eTjCx | |
G9WA== | |
X-Gm-Message-State: | AE9vXwM5SsHSlfGrcM/eDwkoDGmkDYj/iBkMFJiv+ySdFvDlBPpG9/sS3P8jBzYxM6nX3YQsD9XEk6/ucM0+JA== |
X-Received: | by 10.25.16.92 with SMTP id f89mr792766lfi.143.1472048603471; Wed, |
24 Aug 2016 07:23:23 -0700 (PDT) | |
MIME-Version: | 1.0 |
In-Reply-To: | <39718d63-9fb1-3cd0-bcfd-32c60e0255ef@prochac.sk> |
References: | <20160728160657 DOT 7f68f787 AT debian> <20160728174027 DOT 453b2b41 AT debian DOT olsr> |
<20160728192015 DOT 4fc84ce8 AT debian DOT olsr> <201607282248 DOT u6SMmTxw006065 AT envy DOT delorie DOT com> | |
<f3e69165-857d-c541-33d1-557fc93172a4 AT prochac DOT sk> <b7127584-363e-2903-3382-8ba0eda2c02d AT prochac DOT sk> | |
<39718d63-9fb1-3cd0-bcfd-32c60e0255ef AT prochac DOT sk> | |
From: | "Evan Foss (evanfoss AT gmail DOT com) [via geda-help AT delorie DOT com]" <geda-help AT delorie DOT com> |
Date: | Wed, 24 Aug 2016 14:23:22 +0000 |
Message-ID: | <CAM2RGhRNs3Vw5rW2NTo_0ycgSatXiMGCjLKL1eWtYpnfg0enMw@mail.gmail.com> |
Subject: | Re: [geda-help] pcb: blind via |
To: | geda-help AT delorie DOT com |
Reply-To: | geda-help AT delorie DOT com |
Errors-To: | nobody AT delorie DOT com |
X-Mailing-List: | geda-help AT delorie DOT com |
X-Unsubscribes-To: | listserv AT delorie DOT com |
On Wed, Aug 24, 2016 at 12:26 PM, Milan Prochac (milan AT prochac DOT sk) [via geda-help AT delorie DOT com] <geda-help AT delorie DOT com> wrote: > > Status update, to keep the topic warm: > > * visual presentation: > - blind/buried vias have 2 half-circles drawn on top; colors indicate > starting and ending layer of blind/buried via > (https://static.bastl.sk/pcb/bvias_01.png) > - if all layers penetrated by blind/buried via are turned off the via is > thin-drawn (https://static.bastl.sk/pcb/bvias_02.png) > > * action to set blind/buried vias was modified to allow set only one end and > use currently active layer; such actions can be bound to menu items and > hot-keys (done for GTK HID) - https://static.bastl.sk/pcb/bvias_03.png and > https://static.bastl.sk/pcb/bvias_04.png. These actions together with > visualisation and immediate on-screen changes seems to be sufficient user > interface, so no GUI dialog will be implemented. > > * Ratnest optimization and short detection was modified to take blind/buried > into account > > * Layer management is partially done - adding and removing layer works fine, > moving layer is not completely finished/tested. > > * When layer is changed during line draw, the automatically created vias can > be blind/buried; the same applies for line move from one layer to another. > This behavior is controlled by option > (https://static.bastl.sk/pcb/bvias_06.png). On following pictures the > identical operation was first performed with option switched off (upper > track) and with option switched on; line draw: > https://static.bastl.sk/pcb/bvias_04.png and line move: > https://static.bastl.sk/pcb/bvias_05.png. The via creation logic was not > changed, only via type is affected. > > * export hid was adjusted to create additional drill layers for layer pairs > connected by blind/buried vias. The default drill layer is used for > through-hole pins and vias - if no blind/buried vias are used, there is no > change in generated output. > - no changes in exporter API; backward compatibility with external > exporters is retained > - PS and Gerber exporters were modified to accept additional layers - the > only change was the filename creation (plus font size and line spacing on > TOC page of PS export); for gerber the alternate naming schemes need to be > adjusted. > - remaining standard exporters need to be reviewed, but at first look they > do not need any change; the OpenSCAD exporter will be adjusted later. > > There are still some minor issues - for example freedom in layer grouping: > if layer group does not contain contiguous layers, the behavior is confusing > (but correct) in some situations. I need to decide the level of warnings > about this situation or enforcing the contiguous layer groups. > > Another one are degraded vias (single layer vias). Vias with both ends on > the same layer can be avoided (and automatically deleted after layer removal > for example), but vias with both ends on same layer group cannot be avoided > easily. Behavior is correct, just unnecessary copper ring with no associated > drill is created on respective layer group. Maybe these degraded vias > should be detected as part of DRC. > > The special topic is the output used for PCB fabrication. Currently the > drill pairs are automatically generated. Maybe some kind of drill pair > configuration and checks if design fits these pairs should be implemented. I > have very little experience with commercial packages (and no time to learn > them), so some feedback or ideas are welcome. I like your ideas. I feel like we should have an easier way to make vias though. Going to a drop down to select via and then what type is more clicks. i think a separate button for non-through board via would be a better option. > Milan > > > > > On 8/3/2016 3:31 AM, Milan Prochac (milan AT prochac DOT sk) [via > geda-help AT delorie DOT com] wrote: >> >> >> Update: >> >> Already implemented: >> 1. internal representation. Single connection per via is implemented. >> Via stacking will be enabled later. >> 2. file format with backward compatibility (if no blind/buried vias are >> used); bugs fixed >> 3. new action SetViaLayers implemented. Select action extended by >> BuriedVias parameter. See generated pcb.pdf for more details >> 3a. Undo was extended to cover new operations >> 4. object report (Ctrl-R) contains information about blind/buried vias >> 5. Drawing code updated: >> 5a. on GUI HID (screen) vias themselves are drawn unchanged. Any >> recommendation how to visually distinguish blind/buriad vias from >> through-hole vias are welcome. >> 5b. on GUI HID (screen) clerarances and thermals are cut-out only on >> respective layers >> 5c. on non-GUI HID exporters both vias and clearances/thermals are >> drawn on respective layers only >> 6. exporters which use standard drawing interface displays correct data >> (tested on PostScript and gerber). Drill information will require serious >> reworking - single plated and unplated drill is not sufficient; >> >> What will come next >> 7. ERC check (optimize rats) to evaluate connections only on proper >> layers >> 8. maintain layer information after layer operations: new layer, remove >> layer, move layer >> 9. maintain layer information after line move to another layer >> 10. automatically create blind/buried via when changed layer during line >> drawing; it will be controlled by option. >> 11. update solder mask drawing >> 12. GUI dialog to change via type >> >> Current code: https://static.bastl.sk/pcb/Burried-vias-step-2.tar.gz . >> Testers are welcome. >> >> Milan >> >> > > -- Home http://evanfoss.googlepages.com/ Work http://forge.abcd.harvard.edu/gf/project/epl_engineering/wiki/ -----BEGIN PGP PUBLIC KEY BLOCK----- Version: GnuPG v2 mQENBFYy4RYBCAC183JomLtbdAlcKiaPDoVHq52LDmVmH75aiEc69m7YxDt54/ai VtYCAobbGVIyn3Hlz3uhF6LnPl/6Lm1VdnCfpwu3KQhCO6ds10ow2C30X4ohCqOd hCVg5C+ILmQkEffFrFODy3ji+PYTF4pADvHCWsTMv0hf0llwFOJsBCK6cl02IffE JPqy4PjM1nZ9HpzT84JBaG/4OGvTZ8SQ2yFUl265jagvygPTf88H1xpZHH1r8dB1 stjUHLmPH8AOyDgKxFchgGeDc3p/vJtgDDIXAFfDXG0NSRovLmtaQdGxe47Zf/go bXiEM7YL2WqQe5zfEA919JxkEwlDKYniOSVzABEBAAG0N0V2YW4gRm9zcyAoVGhp cyBpcyBteSBwdWJsaWMga2V5LikgPGV2YW5mb3NzQGdtYWlsLmNvbT6JATkEEwEC ACMFAlYy4RYCGwMHCwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCIpQTcE8nN bbBaCACAm8pU5lG1ev2Fsw68Axtcl57SJrYieqX96c3YuYH9JpqMqJRnd9nDKw9X tQuvuH7tUk0VbOaDqReOYJVI/4c5wb9AaOFp6K2DUcupq6XhgXpvz3HzoPwjAdIj XuQzdRUx5+innTJrSkGuBYW/CZ2zqEx4xfLlq4rO0hoTUMR8QVp2cCrkw6BT0m86 APIw/ZnjoxM8IEzr7MxfRIg3qpzrZk28rmhx+k78Jyk61UhwcCPGIm/pjUopTwYJ 3YBdRB2cYD2aN7A1JVf5cRmSQYooHBGpH0kYvomGk97PKqypVuJ7OpG9xM58wUcC qUVt9hKlePLzP8csYjt8onqI7qIIuQENBFYy4RYBCADlH8spG3WkCx62vB5mr5Z0 SCDd/RcyA4A5y5EOj5KurQkrSWpgi9Ho1yKruMJ6blQR2qkc66KqH9pnXDm/ZI1M K/wdW3ngETxBmXoozzFMT89aEWIVR5/PFodWK1elekE9iJxACuR98Zg2QttTD3x8 A9w8VEyMLOXcDTrPFpHegMKswFBg5iuMulAdXAoGejWTI3n+qKFpabHm2Lfs6wjk 5rjucpTdeFK6UeWF1xAvNxXibuu5BlGwv53930qIXRwO/Gn2Rh5DXWxKU2fEIme/ xgQQmIsDeUoWbfybdjw/x7Q0LW4mINiLDQcGHHRQKFIxbAJCT3USPLGh5xwE9/Er ABEBAAGJAR8EGAECAAkFAlYy4RYCGwwACgkQiKUE3BPJzW0uYAf9Hf30n8tM3mR2 Zo6ESE0ivgdgjaJtAWrBUx7JzAzPjBnBOlNnu5Y9lVEqetvUPH6e3PvaHYUuaUU8 0HwxuKBW9nUprgV6uIu1DZmlcp+SxpbuCy7RDpNocRLNWWFMaYYzznmTgfnTgD4D gCq8Mf1mcfrluTkOAo+QNqbMfl1GISClopRqxVuAo59ewgMnFujwgd8w12BwWl24 CzqOs5HqcUslePj+LzcjSNgVCklYwKl+0dsb/fctMOCtHodwqm2CBJ+zydvNmYkD fxda/J91Z1xrah5ec++FL0L4vs+jCiIWJeupJFKlr1hCMZiiGH7W554loK5l4jv3 EY347EidAw== =Ta4p -----END PGP PUBLIC KEY BLOCK-----
webmaster | delorie software privacy |
Copyright © 2019 by DJ Delorie | Updated Jul 2019 |