Mail Archives: geda-help/2016/07/29/04:55:12
Am Thu, 28 Jul 2016 18:48:29 -0400
schrieb DJ Delorie <dj AT delorie DOT com>:
> > > I need the Info for VIA, is the Layer Part of the VIA.
> > > I need a new Button to break VIA on specific Layer.
> > >
> > > * Botton for disable Via on Layer x.
> > > * Modify pcb-file with this Info.
> > > * Modify Gerber-file with this Info.
> >
> > I think the blind via is one of the important features, not nice to
> > have! If some body show me the point in the code, is try to insert
> > the code. But, only in C or Python. I will not learn a new
> > language.
>
> There's a couple parts of the problem, which end up scattered among
> various parts of pcb... and I think someone has done part of the work
> already, a bit of searching should find a patch.
>
> * How is a blind/buried via represented internally? Can that
> represent all possibilities that a FAB house can make?
1. I will ask a fab-house. I think, all is possibility.
2. It will be more important, wich solution have Gerber-File.
>
> * How do you edit them in the GUI, or even draw them on the screen?
1. You can use the Thrm button for rotate the parameter.
2. May be, you change this attribute in circle with the THRM-Form.
>
> * What changes to the file format will be needed? Are they backward
> compatible?
1. If it is possible, we should it make backward compatible.
2. We need a option per via tho disable several layers.
>
> * What about DRC, optimizers, autorouters, and exporters? Do they
> need changes to handle them?
This is the only real problem (: and hard work.
How do you serve the Info for:
DRC,
autorouter,
Lookup Connection.
>
> * What about the gerber exports? How do we break down the drills so
> that FABs "just know" what to do with them?
I will ask the FAB for the standard.
>
> What makes this a tough problem is that you have to have at least a
> *bad* solution to *all* of the above, to be able to use it at all. A
> *good* solution still needs to cover *all* the above. Getting part
> way through and hitting a problem can be very discouraging, but if
> you're up to the challenge, we can point out the specific source files
> you'll need to deal with.
>
I know.
I will help fore the preferred the good solution.
> And PCB at the moment is pure C, although we prefer you avoid things
> that aren't also C++ (i.e. don't use a variablenamed "class" ;)
>
I not demonise "class" in Python. It is some time very useful.
> If you're interested, find the "tracking the latest" info here:
> http://pcb.geda-project.org/obtaining.html
>
> That will get you a source tree you can build and play with. Also,
> the geda-users mailing list or #geda on OFTC are good places to talk
> about the PCB internals.
OK, i will take a look.
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