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Date:	Tue, 28 Jul 2015 10:41:10 -0400
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Subject:	Re: [geda-help] Strategy of adding netname attributes in gSchem?
From:	"Evan Foss (evanfoss AT gmail DOT com) [via geda-help AT delorie DOT com]" <geda-help AT delorie DOT com>
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I don't mean to stomp on your dreams but there is an ethical concern
here. You are very likely to harm bats. 60KHz is the centre of here
hearing frequency.

On Mon, Jul 27, 2015 at 4:50 AM, Csányi Pál (csanyipal AT gmail DOT com) [via
geda-help AT delorie DOT com] <geda-help AT delorie DOT com> wrote:
> Hello,
>
> I'm working on my little mosquito repellent project.
> So far I have the schematic completed ( see attachment ).
> What did I furter to get the pcb?
>
> I create a new empty pcb with pcb application.
> After that I run gsch2pcb on project file:
> gsch2pcb tervezet
>
> ----------------------------------
> Done processing.  Work performed:
> 9 file elements and 0 m4 elements added to
> KornyezetKimeloSzunyogRiaszto.new.pcb.
>
> Next steps:
> 1.  Run pcb on your file KornyezetKimeloSzunyogRiaszto.pcb.
> 2.  From within PCB, select "File -> Load layout data to paste buffer"
>     and select KornyezetKimeloSzunyogRiaszto.new.pcb to load the new
> footprints into your existing layout.
> 3.  From within PCB, select "File -> Load netlist file" and select
>     KornyezetKimeloSzunyogRiaszto.net to load the updated netlist.
>
> 4.  From within PCB, enter
>
>            :ExecuteFile(KornyezetKimeloSzunyogRiaszto.cmd)
>
>     to update the pin names of all footprints.
>
> But what I did is far from perfect; the resulted ratnest's are wrong.
>
> So what is the preferred way  - or strategy - to set up netnames so so
> one can get proper pcb layout at the and?
>
> --
> Regards from Pál



-- 
Home
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Work
http://forge.abcd.harvard.edu/gf/project/epl_engineering/wiki/

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