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From:	Mike Bushroe <mbushroe AT gmail DOT com>
Date:	Sun, 16 Nov 2014 22:38:28 -0700
Message-ID:	<CA+CyYa3aF4r3t4PjHFYOuwUox5LJBozMrmZSake5GP_86s9zTg@mail.gmail.com>
Subject:	Re: [geda-help] Still Stuck, or should I say Shorted
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DJ,

  Thanks for the help. I run gsymcheck on all my new sanitized symbols.
Biggest problem was lack of numslots=3D0, plus all the missing pinlabels. I
then went back to my remade power page, switched to the sanitized symbols
and re-ran the GUI sch2pcb. The pcb message log still reports nearly every
net shorted to nearly every other net, but when I dispersed the footprint
and optimized the rats, it looks like all the rat lines are there. I think
I just need to ignore the hundreds of warning messages. If you would still
like to see the schematic with all the symbols sucked in I would be happy
to send it. But as long as I can get most or all of the rats on the pcb
layout I can make the board from here. I still need to make the
microcontroller page, and then take the three pages of a phase-per-page and
rewrite them to work flat and I should be able to start laying components
and running traces. Finally.

Mike

On Sun, Nov 16, 2014 at 9:56 PM, DJ Delorie <dj AT delorie DOT com> wrote:

>
> If you have a simple non-heirarchical schematic that doesn't netlist
> properly, email it to me (directly, not via the list) and I'll look at
> it.
>
> NOTE: use "gschlas -e myproject.sch" to embed any custom symbols
> before sending it.
>



--=20
"Creativity is intelligence having fun." =E2=80=94 Albert Einstein

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<div dir=3D"ltr"><div><div>DJ,<br><br></div>=C2=A0 Thanks for the help. I r=
un gsymcheck on all my new sanitized symbols. Biggest problem was lack of n=
umslots=3D0, plus all the missing pinlabels. I then went back to my remade =
power page, switched to the sanitized symbols and re-ran the GUI sch2pcb. T=
he pcb message log still reports nearly every net shorted to nearly every o=
ther net, but when I dispersed the footprint and optimized the rats, it loo=
ks like all the rat lines are there. I think I just need to ignore the hund=
reds of warning messages. If you would still like to see the schematic with=
 all the symbols sucked in I would be happy to send it. But as long as I ca=
n get most or all of the rats on the pcb layout I can make the board from h=
ere. I still need to make the microcontroller page, and then take the three=
 pages of a phase-per-page and rewrite them to work flat and I should be ab=
le to start laying components and running traces. Finally.<br><br></div>Mik=
e<br></div><div class=3D"gmail_extra"><br><div class=3D"gmail_quote">On Sun=
, Nov 16, 2014 at 9:56 PM, DJ Delorie <span dir=3D"ltr">&lt;<a href=3D"mail=
to:dj AT delorie DOT com" target=3D"_blank">dj AT delorie DOT com</a>&gt;</span> wrote:<b=
r><blockquote class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:=
1px #ccc solid;padding-left:1ex"><br>
If you have a simple non-heirarchical schematic that doesn&#39;t netlist<br=
>
properly, email it to me (directly, not via the list) and I&#39;ll look at<=
br>
it.<br>
<br>
NOTE: use &quot;gschlas -e myproject.sch&quot; to embed any custom symbols<=
br>
before sending it.<br>
</blockquote></div><br><br clear=3D"all"><br>-- <br><div class=3D"gmail_sig=
nature"><div dir=3D"ltr"><span style=3D"font-family:arial,sans-serif;font-s=
ize:11pt">&quot;Creativity is intelligence having fun.&quot; =E2=80=94 Albe=
rt Einstein</span></div></div>
</div>

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