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From:	John Doty <jpd AT noqsi DOT com>
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Subject:	Re: [geda-help] gschem, ngspice and transformers (again)
Date:	Sun, 26 Jan 2014 19:45:23 -0700
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On Jan 26, 2014, at 6:17 AM, Tom wrote:

> Hi
> I'm just starting with geda but I was a microchip designer in the 80's =
so please accept my apologies if I seem a bit spoilt and needy!

As a microchip designer myself, using gEDA, I understand the paradigm.

>=20
> I want to be able to put in hierarchical schematics and run spice (ng) =
simulations from them and I'd like to be able to use and share gschem =
stuff but it seems its not worth it as postings in the mailing list from =
2010 re transformers suggest hand coding.
> Is there any way of (say) adding the attributes L1,L2 and K (for a =
simple transformer) and then either running a macro or getting gnetlist =
to substitute the component for the appropriate (generated) netlist or =
connected subcircuit?

It's possible with the gnetlist back end at =
https://github.com/noqsi/gnet-spice-noqsi

One way is to draw a subcircuit for the transformer and make up the =
appropriate matching symbol. Here's an example:


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T 45100 47750 5 8 0 1 0 0 1
pinlabel=1
T 45100 47750 5 8 0 1 0 0 1
pintype=pas
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L 45201 47800 45150 47700 3 0 0 0 -1 -1
T 45300 48000 5 10 0 0 0 0 1
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T 45200 47900 8 10 0 1 0 0 1
refdes=R?
T 45000 47600 8 10 0 1 0 0 1
pins=2
T 45000 47600 8 10 0 1 0 0 1
class=DISCRETE
]
{
T 45200 47900 5 10 1 1 0 0 1
refdes=Rp1
T 45200 47400 5 10 1 1 0 0 1
value=20m
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T 46450 45900 5 8 0 1 270 0 1
pinnumber=2
T 46350 45900 5 8 0 1 270 2 1
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T 46400 46000 5 8 0 1 270 8 1
pintype=pas
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T 46450 46600 5 8 0 1 270 6 1
pinnumber=1
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pintype=pas
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{
T 46600 46300 5 10 1 1 0 0 1
refdes=Lp
T 47000 46500 5 10 0 0 270 0 1
symversion=0.1
T 46500 46000 5 10 1 1 0 0 1
value=10uH
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C 45000 46600 1 0 0 EMBEDDEDresistor-1.sym
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L 45700 46600 45750 46700 3 0 0 0 -1 -1
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T 45800 46750 5 8 0 1 0 0 1
pinnumber=2
T 45800 46750 5 8 0 0 0 0 1
pinseq=2
T 45800 46750 5 8 0 1 0 0 1
pinlabel=2
T 45800 46750 5 8 0 1 0 0 1
pintype=pas
}
P 45000 46700 45152 46700 1 0 0
{
T 45100 46750 5 8 0 1 0 0 1
pinnumber=1
T 45100 46750 5 8 0 0 0 0 1
pinseq=1
T 45100 46750 5 8 0 1 0 0 1
pinlabel=1
T 45100 46750 5 8 0 1 0 0 1
pintype=pas
}
L 45201 46800 45150 46700 3 0 0 0 -1 -1
T 45300 47000 5 10 0 0 0 0 1
device=RESISTOR
T 45200 46900 8 10 0 1 0 0 1
refdes=R?
T 45000 46600 8 10 0 1 0 0 1
pins=2
T 45000 46600 8 10 0 1 0 0 1
class=DISCRETE
]
{
T 45200 46900 5 10 1 1 0 0 1
refdes=Rp2
T 45200 46400 5 10 1 1 0 0 1
value=20m
}
C 45000 45700 1 0 0 EMBEDDEDresistor-1.sym
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L 45500 45700 45400 45900 3 0 0 0 -1 -1
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L 45600 45900 45700 45700 3 0 0 0 -1 -1
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T 45800 45850 5 8 0 1 0 0 1
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T 45800 45850 5 8 0 0 0 0 1
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T 45800 45850 5 8 0 1 0 0 1
pinlabel=2
T 45800 45850 5 8 0 1 0 0 1
pintype=pas
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P 45000 45800 45152 45800 1 0 0
{
T 45100 45850 5 8 0 1 0 0 1
pinnumber=1
T 45100 45850 5 8 0 0 0 0 1
pinseq=1
T 45100 45850 5 8 0 1 0 0 1
pinlabel=1
T 45100 45850 5 8 0 1 0 0 1
pintype=pas
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L 45201 45900 45150 45800 3 0 0 0 -1 -1
T 45300 46100 5 10 0 0 0 0 1
device=RESISTOR
T 45200 46000 8 10 0 1 0 0 1
refdes=R?
T 45000 45700 8 10 0 1 0 0 1
pins=2
T 45000 45700 8 10 0 1 0 0 1
class=DISCRETE
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{
T 45200 46000 5 10 1 1 0 0 1
refdes=Rp3
T 45200 45500 5 10 1 1 0 0 1
value=20m
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C 45000 44700 1 0 0 EMBEDDEDresistor-1.sym
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L 45500 44700 45400 44900 3 0 0 0 -1 -1
L 45400 44900 45300 44700 3 0 0 0 -1 -1
L 45300 44700 45200 44900 3 0 0 0 -1 -1
L 45600 44900 45700 44700 3 0 0 0 -1 -1
L 45700 44700 45750 44800 3 0 0 0 -1 -1
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{
T 45800 44850 5 8 0 1 0 0 1
pinnumber=2
T 45800 44850 5 8 0 0 0 0 1
pinseq=2
T 45800 44850 5 8 0 1 0 0 1
pinlabel=2
T 45800 44850 5 8 0 1 0 0 1
pintype=pas
}
P 45000 44800 45152 44800 1 0 0
{
T 45100 44850 5 8 0 1 0 0 1
pinnumber=1
T 45100 44850 5 8 0 0 0 0 1
pinseq=1
T 45100 44850 5 8 0 1 0 0 1
pinlabel=1
T 45100 44850 5 8 0 1 0 0 1
pintype=pas
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L 45201 44900 45150 44800 3 0 0 0 -1 -1
T 45300 45100 5 10 0 0 0 0 1
device=RESISTOR
T 45200 45000 8 10 0 1 0 0 1
refdes=R?
T 45000 44700 8 10 0 1 0 0 1
pins=2
T 45000 44700 8 10 0 1 0 0 1
class=DISCRETE
]
{
T 45200 45000 5 10 1 1 0 0 1
refdes=Rp4
T 45200 44500 5 10 1 1 0 0 1
value=20m
}
N 45900 46700 46400 46700 4
N 46400 46700 46400 47700 4
N 46400 47700 45900 47700 4
N 45900 45800 46400 45800 4
N 46400 45800 46400 44800 4
N 46400 44800 45900 44800 4
C 48000 46700 1 90 1 EMBEDDEDinductor-dot-1.sym
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P 48000 45800 48000 45950 1 0 0
{
T 47950 45900 5 8 0 1 90 6 1
pinnumber=2
T 48050 45900 5 8 0 1 90 8 1
pinseq=2
T 48000 46000 9 8 0 1 90 0 1
pinlabel=2
T 48000 46000 5 8 0 1 90 2 1
pintype=pas
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pinnumber=1
T 48050 46600 5 8 0 1 90 2 1
pinseq=1
T 48000 46500 9 8 0 1 90 6 1
pinlabel=1
T 48000 46500 5 8 0 1 90 8 1
pintype=pas
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A 48000 46463 75 90 180 3 0 0 0 -1 -1
A 48000 46321 75 90 180 3 0 0 0 -1 -1
A 48000 46179 75 90 180 3 0 0 0 -1 -1
A 48000 46037 75 90 180 3 0 0 0 -1 -1
L 48000 45962 48000 45950 3 0 0 0 -1 -1
L 48000 46550 48000 46538 3 0 0 0 -1 -1
A 48000 46392 4 270 180 3 0 0 0 -1 -1
A 48000 46250 4 270 180 3 0 0 0 -1 -1
A 48000 46108 4 270 180 3 0 0 0 -1 -1
V 47929 46547 13 3 0 0 0 -1 -1 1 -1 -1 1 -1 1
T 47600 46500 5 10 0 0 90 6 1
device=INDUCTOR
T 47800 46500 8 10 0 1 90 6 1
refdes=L?
T 47000 46500 5 10 0 0 90 6 1
description=inductor
T 47200 46500 5 10 0 0 90 6 1
numslots=0
T 47400 46500 5 10 0 0 90 6 1
symversion=0.1
]
{
T 47800 46300 5 10 1 1 0 6 1
refdes=Ls
T 47400 46500 5 10 0 0 270 2 1
symversion=0.1
T 48000 46200 5 10 1 1 0 0 1
value=1mH
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C 49400 46600 1 0 1 EMBEDDEDresistor-1.sym
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L 48900 46600 49000 46800 3 0 0 0 -1 -1
L 49000 46800 49100 46600 3 0 0 0 -1 -1
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pinseq=2
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T 49300 46750 5 8 0 1 0 6 1
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L 49199 46800 49250 46700 3 0 0 0 -1 -1
T 49100 47000 5 10 0 0 0 6 1
device=RESISTOR
T 49200 46900 8 10 0 1 0 6 1
refdes=R?
T 49400 46600 8 10 0 1 0 6 1
pins=2
T 49400 46600 8 10 0 1 0 6 1
class=DISCRETE
]
{
T 49200 46900 5 10 1 1 0 6 1
refdes=Rs
T 49200 46400 5 10 1 1 0 6 1
value=1.45
}
N 48500 46700 48000 46700 4
N 48000 45800 50000 45800 4
{
T 50300 45700 5 10 1 1 0 6 1
netname=P8
}
N 45000 47700 44400 47700 4
{
T 44100 47600 5 10 1 1 0 0 1
netname=P5
}
N 45000 46700 44400 46700 4
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T 44100 46600 5 10 1 1 0 0 1
netname=P6
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N 45000 45800 44400 45800 4
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T 44100 45700 5 10 1 1 0 0 1
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N 45000 44800 44400 44800 4
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T 44100 44700 5 10 1 1 0 0 1
netname=P4
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N 49400 46700 50000 46700 4
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T 50300 46600 5 10 1 1 0 6 1
netname=P1
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C 46700 46600 1 0 0 EMBEDDEDkmutual-1.sym
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L 46800 46900 46900 47000 3 0 0 0 -1 -1
L 47600 46900 47700 47000 3 0 0 0 -1 -1
L 47600 46900 47500 47000 3 0 0 0 -1 -1
T 47000 47050 8 10 0 1 0 0 1
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T 47000 46900 8 10 0 1 0 0 1
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T 47000 46695 8 10 0 1 0 0 1
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T 46700 46590 8 10 0 1 0 0 1
device=K
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T 47000 47050 5 10 1 1 0 0 1
refdes=Kps
T 47000 46900 5 10 1 1 0 0 1
value=0.985
T 47000 46695 5 10 1 1 0 0 1
inductors=Lp Ls
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C 49300 46700 1 270 0 EMBEDDEDcapacitor-1.sym
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P 49500 46700 49500 46500 1 0 0
{
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pinnumber=1
T 49450 46550 5 8 0 1 270 8 1
pinseq=1
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P 49500 45800 49500 46000 1 0 0
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T 49550 45950 5 8 0 1 270 0 1
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T 49450 45950 5 8 0 1 270 2 1
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T 49500 46000 9 8 0 1 270 6 1
pinlabel=2
T 49500 46000 5 8 0 1 270 8 1
pintype=pas
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L 49700 46300 49300 46300 3 0 0 0 -1 -1
L 49700 46200 49300 46200 3 0 0 0 -1 -1
L 49500 46000 49500 46200 3 0 0 0 -1 -1
L 49500 46300 49500 46500 3 0 0 0 -1 -1
T 50000 46500 5 10 0 0 270 0 1
device=CAPACITOR
T 49800 46500 8 10 0 1 270 0 1
refdes=C?
T 50600 46500 5 10 0 0 270 0 1
description=capacitor
T 50400 46500 5 10 0 0 270 0 1
numslots=0
T 50200 46500 5 10 0 0 270 0 1
symversion=0.1
]
{
T 49600 46400 5 10 1 1 0 0 1
refdes=Cs
T 50200 46500 5 10 0 0 270 0 1
symversion=0.1
T 49600 46000 5 10 1 1 0 0 1
value=100pF
}
T 46500 43400 8 10 1 0 0 0 1
spice-prolog=.subckt T32050R P5 P6 P3 P4 P1 P8

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v 20110115 2
L 500 1100 200 1100 3 0 0 0 -1 -1
A 500 1000 100 270 180 3 0 0 0 -1 -1
A 500 400 100 270 180 3 0 0 0 -1 -1
A 500 200 100 270 180 3 0 0 0 -1 -1
L 500 100 200 100 3 0 0 0 -1 -1
L 1000 100 1300 100 3 0 0 0 -1 -1
A 1000 200 100 90 180 3 0 0 0 -1 -1
A 1000 400 100 90 180 3 0 0 0 -1 -1
A 1000 1000 100 90 180 3 0 0 0 -1 -1
L 1000 1100 1300 1100 3 0 0 0 -1 -1
L 700 1200 700 0 3 0 0 0 -1 -1
L 800 1200 800 0 3 0 0 0 -1 -1
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pinlabel=5
T 100 1150 5 8 0 1 0 0 1
pintype=pas
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P 1500 100 1300 100 1 0 0
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P 1500 1100 1300 1100 1 0 0
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T 1400 1150 5 8 1 1 0 0 1
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pinlabel=1
T 1400 1150 5 8 0 1 0 0 1
pintype=pas
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T 300 1300 8 10 1 1 0 0 1
refdes=T?
T 300 1300 8 10 0 0 0 0 1
device=transformer
A 500 800 100 270 180 3 0 0 0 -1 -1
A 500 600 100 270 180 3 0 0 0 -1 -1
A 1000 800 100 90 180 3 0 0 0 -1 -1
A 1000 600 100 90 180 3 0 0 0 -1 -1
V 1000 1000 50 3 0 0 0 -1 -1 1 -1 -1 -1 -1 -1
V 500 1000 50 3 0 0 0 -1 -1 1 -1 -1 -1 -1 -1
P 200 900 0 900 1 0 1
{
T 100 950 5 8 1 1 0 0 1
pinnumber=6
T 100 950 5 8 0 0 0 0 1
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T 100 950 5 8 0 1 0 0 1
pinlabel=6
T 100 950 5 8 0 1 0 0 1
pintype=pas
}
L 200 900 200 1100 3 0 0 0 -1 -1
P 200 300 0 300 1 0 1
{
T 100 350 5 8 1 1 0 0 1
pinnumber=3
T 100 350 5 8 0 0 0 0 1
pinseq=3
T 100 350 5 8 0 1 0 0 1
pinlabel=3
T 100 350 5 8 0 1 0 0 1
pintype=pas
}
L 200 300 200 100 3 0 0 0 -1 -1
T 300 1500 8 10 0 0 0 0 1
spice-prototype=X? #5 #6 #3 #4 #1 #8 T32050R

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This is for a particular commercial transformer. For your parameterized =
problem, I'd use a parameterized subcircuit (supported in ngspice). To =
get gnetlist to pass the parameters to ngspice, you'll need to modify =
the spice-prototype attribute in the symbol and the spice-prolog =
attribute in the schematic.

Note that gnet-spice-noqsi is designed for constructing the elements of =
a SPICE hierarchical netlist rather than a flat netlist. You use it one =
subcircuit at a time, and then arrange to feed all the subcircuits to =
SPICE (I use a Makefile to drive this). You'll probably want a =
gnetlistrc file containing:

(hierarchy-traversal "disabled")

to prevent the usual flattening of the netlist.

John Doty              Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd AT noqsi DOT com



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