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Mail Archives: geda-help/2011/09/23/05:05:19

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Subject: Re: [geda-help] PCB Plane and Solder Mask Clearance Problem
From: Peter Clifton <pcjc2 AT cam DOT ac DOT uk>
To: geda-help AT delorie DOT com
Date: Fri, 23 Sep 2011 10:04:59 +0100
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On Thu, 2011-09-22 at 22:45 -0400, Eric Wetzel wrote:
> >> If its still not working for you with GL enabled - could you post the
> >> output of "glxinfo" for me to take a look at please?

Your glxinfo shows you are using the Nouveau driver. It might be worth
giving it a try with the proprietary driver at some point.

Before you try that, try starting PCB with the current mesa based
driver, with:

LIBGL_ALWAYS_SOFTWARE=3D1 pcb ...

If things then work as expected - we can confirm it is a bug in your GL
driver (or my code failing to test some capability in your GL driver).

> > I'm cloning the pcb+gl repository right now; I'll give that a shot.
>=20
> On the pcb+gl head, I configured with only the prefix option. I'm not
> sure if I had to explicitly enable GL or if I should be using the
> lesstif front-end, but I just let configure do its thing. Opening my
> file in this version of pcb not only has the same lack-of-clearance
> problems around vias, pins, and pads, but now the drill holes don't
> appear either. Vias and pins just gray circles.

How odd. Both symptoms suggest to me that the GL driver's "stencil"
feature may not be working properly.

The Lesstif GUI currently doesn't have any GL support, and in my pcb+gl,
pcb+gl_experimental etc.. branches, the Lesstif GUI probably won't even
build.

Thanks for debugging this with me,

Best wishes,

--=20
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)

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