Mail Archives: djgpp/2009/05/14/00:31:44

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From: Rugxulo <rugxulo AT gmail DOT com>
Newsgroups: comp.os.msdos.djgpp
Subject: Re: Please help resurrecting GDB for version 7.0 release
Date: Wed, 13 May 2009 21:29:59 -0700 (PDT)
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To: djgpp AT delorie DOT com
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Reply-To: djgpp AT delorie DOT com


On May 13, 10:03=A0pm, "A. Wik" <r DOT  DOT  DOT  AT dynamite DOT narpes DOT com> wrote:
> On Tue, 5 May 2009, Eli Zaretskii wrote:
> > > From: Rugxulo <rugx DOT  DOT  DOT  AT gmail DOT com>
> > > Date: Mon, 4 May 2009 22:08:44 -0700 (PDT)
> > That depends on the method you use for detecting the CPU. =A0If you use
> > no privileged instructions, there should be no reason to test under
> > different OSes, I think. =A0Otherwise, yes.
> This may not be relevant to a specific situation, but
> generally speaking, bugs can occur in any any instruction,
> privileged or otherwise. =A0For example, the F00F and FDIV
> CPU bugs[1] require no privileges[2] to trigger. =A0

What bothers me is that you can't even *read* a control register.
Sure, some smart guys emulate it (JEMM386), but most don't (Vista).
How are you supposed to know that SSE is enabled? Either run, crash,
recover ... or do something weird and undocumented (fxsave, fxrstor,
fxsave, is XMM0 saved? if not, not enabled). Already mailed a snippet
of this to Eli and CWS for testing although it works fine for me on
various cpus. Not that I honestly think SSE support is easy to
implement (or crucial, even), so I'm pessimistic, but hey, worth a
try, even if my help is pretty worthless.    ;-)

> Also, normally unprivileged instructions such as floating point
> can be programmed to generate exceptions, although that is
> normally only done on CPUs lacking a math co-processor or
> FPU [3], such as the 486SX and most 386 (SX, DX, or null
> suffix) systems.

I wish I was smart enough to make DJGPP (EMU387.DXE, perhaps?) emulate
the CMOV.. instructions. At least then we wouldn't have to worry about
accidental 686+ only compiles. Plus, God forbid, it may actually run
faster on modern machines while still working correctly on older ones.

> -aw
> [1] =A0I think I do have machines, or at least CPUs, affected
> =A0 by either of those two bugs. =A0If anyone has a need to
> =A0 test code under these conditions I might look into it.


Read, then assemble FPU-BUG.ASM, and tell me what you
think.    ;-)      Note that I did a little research browsing the web
a while back, so it should be fairly informative, even if you know a
little already. Of course, my P1 is 166 Mhz, so it can't have the bug.
Still, worth investigating, IMHO. (I could've posted the whole thing
here, it's not too long, but some might consider it off-topic.)   ;-)

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