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Mail Archives: djgpp/2002/10/10/18:31:28

From: sandmann AT clio DOT rice DOT edu (Charles Sandmann)
Message-Id: <10210102233.AA16849@clio.rice.edu>
Subject: Re: Int 0x22???
To: mdsisco AT qtiworld DOT com (Sisco, Michael)
Date: Thu, 10 Oct 2002 17:33:04 -0500 (CDT)
Cc: djgpp AT delorie DOT com
In-Reply-To: <BDD73AE8AEE3EF438E07420C2600E9F65C9192@qtiexch0.qgraph.com> from "Sisco, Michael" at Oct 10, 2002 04:54:37 PM
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> We can have multiple identical PCI boards plugged into our
> system, and they may have to share interrupts with other 
> hardware (or each other), so chaining seems to be the easiest
> solution. We can work around this if need be, but I think we
> have worked out most of our problems (read on).

As long as it works, and you don't miss interrupts or overrun
stacks, fine.  If you need to run at higher frequencies or on
lower end hardware, consider only chaining if the interrupt
isn't one you handled.

> > Ouch.  Try removing the enable (and the disable).  
> > The enable would let a
> > second interrupt hit the wrapper before the first one was clear.

> Bingo! This appears to be the biggest source of our problems. We
> removed these lines from the handler, and things improved 
> dramatically, although I'm not completely sure I understand why.
> Doesn't the interrupt controller prevent "simultaneous" interrupts
> anyway?

This happens after you send the EOI to the controller.  There are
several dozen instructions that need to be executed before you get
out of your routine (and the wrapper) after the STI happens.  If a
second interrupt is pending then it would immediately trigger. 

> Thanks once more,

Glad to help.  We still aren't exactly sure what the Int 0x22 is 
and how it happens, but avoiding it is much better anyway.

It may be some subtle bug in the wrappers, or in CWSDPMI if bad
things happen on the interrupt stack. 

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