From:	Hans-Bernhard Broeker <broeker AT physik DOT rwth-aachen DOT de>
Newsgroups:	comp.os.msdos.djgpp
Subject:	Re: Tool for Makefile
Date:	27 Feb 2001 15:05:28 GMT
Organization:	Aachen University of Technology (RWTH)
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moshe shamy <moshe AT nylus DOT co DOT il> wrote:
> Hi,

> Can i create makefile without writing SubDependency
> (maybe there is a tool which can do it )

You probably mean you don't want to manually put all those lists of
.h files a given .c file #include's into the Makefile, right?

In that case, you'll probably want to look into the GCC docs. Make
doesn't really know a thing about C except for the builtin rules how
to call the C compiler. In particular, it cannot understand what
#include does. But GCC does, which is why that's the place to look.
In particular, you want to look at the node 'Preprocessor Options',
where it explains gcc options '-M' and '-MD'. Or the
DEPENDENCIES_OUTPUT environment variable.

Linux installations have a script 'gccmakedep' that is built on top of
this mechanism.

-- 
Hans-Bernhard Broeker (broeker AT physik DOT rwth-aachen DOT de)
Even if all the snow were burnt, ashes would remain.

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