From:	Vik Heyndrickx <Vik DOT Heyndrickx AT rug DOT ac DOT be>
Newsgroups:	comp.os.msdos.djgpp
Subject:	Re: assembly language
Date:	Wed, 26 Aug 1998 15:45:50 +0200
Organization:	University of Ghent, Belgium
Lines:	14
Message-ID:	<35E4118E.364C@rug.ac.be>
References:	<01J10IURTRN694HU4A AT slu DOT edu> <19980826 DOT 092950 DOT 5903 DOT 2 DOT vcarlos35 AT juno DOT com>
NNTP-Posting-Host:	eduserv1.rug.ac.be
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To:	djgpp AT delorie DOT com
DJ-Gateway:	from newsgroup comp.os.msdos.djgpp

vcarlos35 AT juno DOT com wrote:
> IIRC, Intel CPUs have special functionality for xoring a register with itself.
> It's something about avoiding a partial register stall after modifying the
> 32-bit extended register and than accessing the low-half of it using
> the complementary 16-bit register. Could someone correct me?

Never heard about, so it must be a post-Pentium feature. It could be
true what you say, but it possibly couldn't influence the results of
those instructions unless Intel would have really screwed up this one.

-- 
 \ Vik /-_-_-_-_-_-_/
  \___/ Heyndrickx /
   \ /-_-_-_-_-_-_/  Knight in the Order of the Unsigned Types

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