From:	Peter DOT Henn AT t-online DOT de (Peter)
Newsgroups:	comp.os.msdos.djgpp
Subject:	CPU PCI read burst
Date:	21 Feb 1998 23:02:33 GMT
Organization:	T-Online
Lines:	23
Message-ID:	<6cnme9$60o$1@news01.btx.dtag.de>
Reply-To:	peter AT anywhere DOT de
Mime-Version:	1.0
CC:	comp DOT sys DOT intel AT delorie DOT com
To:	djgpp AT delorie DOT com
DJ-Gateway:	from newsgroup comp.os.msdos.djgpp

Hello PCI freaks,
I want to read memory on a PCI adapter card as fast as possible.
There is no problem to generate write burst on the PCI bus. The
command "_movedatal" in the "sys/movedata.h" from the DJGPP compiler
do this very fine and I see the burst on my LA. Also the PCI interface
hardware can handle this easy save address-data pairs in a FIFO.

But the problem is to read the PCI adapters memory (e.g. graphic
card) from the CPU in PCI burst mode (or multiple read
transactions).
--> Where can I find an example C-code?

If the CPU put a read command and the address on the PCI bus it will
normally wait until it get the data from the PCI adapter. So possible
I must access the PCI adapter memory in a CPU cached mode to generate
burst transfers. Naturally the cache lines must be invalidated before to
garantee cache coherence.

Please answer in this newsgroup and do not send me an email !

Regards,
Peter

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