From:	Andrew Crabtree <andrewc AT typhoon DOT rose DOT hp DOT com>
Message-Id:	<199705201408.AA181387295@typhoon.rose.hp.com>
Subject:	Re: -m486 alignment problem
To:	an096 AT yfn DOT ysu DOT edu
Date:	Tue, 20 May 1997 7:08:15 PDT
Cc:	djgpp AT delorie DOT com
In-Reply-To:	<5lq545$rdp@news.ysu.edu>; from "David A. Scott" at May 19, 97 6:11 pm

>   Are you sure there are alignment problems on the PC. I use
> code that has 16bit wide array structures. And then has another 16bit
> wide array structure that is offset by 8bits and there is no problem.
> I thought PC less sensitive in this area than other machines.
> 

Well the 68K used to fault on misaligned memory accesses, so the x86 
is less sensitive in that regard.  But, if you have a 4 byte variable, and
its aligned, thats only one bus access to get it (on a 32 bit bus).  Screw
up the alignment (shift by 2 bytes),  and now your looking at 2 bus 
accesses to get it.  Memory is slow enough as is.

Andrew

- Raw text -