From:	ovek AT arcticnet DOT no (Ove Kaaven)
Newsgroups:	comp.os.msdos.djgpp
Subject:	Re: DPMI and Page swapping
Date:	Fri, 25 Apr 1997 17:55:24 GMT
Organization:	Vplan Programvare AS
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Message-ID:	<5jqiug$ule$1@troll.powertech.no>
References:	<Pine DOT LNX DOT 3 DOT 91 DOT 970424092240 DOT 577A-100000 AT aditya DOT unigoa DOT ernet DOT in>
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To:	djgpp AT delorie DOT com
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"Gurunandan R. Bhat" <grbhat AT aditya DOT unigoa DOT ernet DOT in> wrote:

>On Fri, 25 Apr 1997, Ove Kaaven wrote:

>> But yes, page tables also have a "Present" bit. When this bit is
>> clear, everything else in this entry is ignored, and is frequently
>> used by the memory manager to store the position on disk where the
>> page is saved.

>could you mail me some details about page related fields in the offset. 
>for example could you confirm the following. i do not yet have a reliable 
>text available to me :( 

>page tables are two level tables when paging is enabled, the first 12
>bits are the offset from the page base, the next 10 point to the page 
>base in a page directory, and the highest 10 relate to the page directory 
>itself.

You just described how a linear address is broken down to be looked up
in page tables. The page table entries themselves have this format:

/* 31..12 frame (physical addr of page)
   11..9 avail (for OS-specific use)
   8 G (PPro, PTE) Global, 1=Global (not flushed from TLB cache on
task switch), 0=Local
   7 PS (Pentium, PDE) Page Size, 1=4Mb (skip PTE lookup), 0=4Kb
(normal)
   6 D Dirty (has been changed, set by CPU)
   5 A Accessed (has been used, set by CPU)
   4 PCD (486) Cache Disable
   3 PWT (486) Write Through
   2 U/S 1=User, 0=Supervisor
   1 R/W 1=Writable, 0=Read-only
   0 P Present */

The register CR3 points to the Page Directory. Each PDE (Page
Directory Entry) points to a Page Table (unless the PS bit (7) is set
on a Pentium and it is enabled, of course). Each of these PTEs (Page
Table Entry) point to the page itself.

When the processor wants to look up a linear address, it uses the high
10 bits as an index into the Page Directory, where it fetches the PDE
for the Page Table. The next 10 bits is then used as an index into the
Page Table, and fetches the PTE for the Page. The last 12 bits is used
as an offset into this page. This is how the CPU it finds the physical
address from a linear address. If either the PDE or the PTE does not
have the Present bit set, a Page Fault occurs. The handler should then
swap the page in, or abort the application, or something else.

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