From:	ao950 AT FreeNet DOT Carleton DOT CA (Paul Derbyshire)
Newsgroups:	comp.os.msdos.djgpp
Subject:	Re: MMX
Date:	10 Mar 1997 04:56:47 GMT
Organization:	The National Capital FreeNet
Lines:	28
Message-ID:	<5g04af$pmd@freenet-news.carleton.ca>
References:	<m0w1tfQ-000S1pC AT natacha DOT inti DOT edu DOT ar> <Pine DOT SGI DOT 3 DOT 91 DOT 970307133506 DOT 1145A-100000 AT atmosp DOT physics DOT utoronto DOT ca>
Reply-To:	ao950 AT FreeNet DOT Carleton DOT CA (Paul Derbyshire)
NNTP-Posting-Host:	freenet2.carleton.ca
To:	djgpp AT delorie DOT com
DJ-Gateway:	from newsgroup comp.os.msdos.djgpp

Peter Berdeklis (peter AT atmosp DOT physics DOT utoronto DOT ca) writes:
> On Tue, 4 Mar 1997, Salvador Eduardo Tropea (SET) wrote:
>> * If you want to use MMX at 100%, you must make one of 2 things:
>> A) Make a very specialized optimizer, is really hard.
>> B) Make an extention of the C language, but will be totally non-standard.
>> 
> [snip]
>>   
>>   If somebody makes that in the (B) fashion the best way is the use of 
>> #pragmas but even with that is very hard because the compiler must see the 
>> parallel operations and how to pack it in parallel MMX operations, plus the 
>> fact that Intel is using FPU registers for that ... 
> 
> If these extensions to C are written they would likely be written in hand
> coded/massaged inline asm.  In that case the compiler doesn't need to know
> anything about packing and parallel op's, just which registers are 
> invalid (eg. the whole FPU stack).

In other words, the minimal MMX support would be just to add to inline asm
the ability to specify "%MMX" as one of The Clobbered to mean the FPU
registers.

--
    .*.  Where feelings are concerned, answers are rarely simple [GeneDeWeese]
 -()  <  When I go to the theater, I always go straight to the "bag and mix"
    `*'  bulk candy section...because variety is the spice of life... [me]
Paul Derbyshire ao950 AT freenet DOT carleton DOT ca, http://chat.carleton.ca/~pderbysh

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