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Mail Archives: djgpp/1997/01/09/18:45:20

Date: Thu, 9 Jan 1997 18:22:28 -0500
Message-Id: <199701092322.SAA00361@delorie.com>
From: DJ Delorie <dj AT delorie DOT com>
To: ovek AT arcticnet DOT no
CC: djgpp AT delorie DOT com
In-reply-to: <5b2fb7$cps$1@troll.powertech.no> (ovek@arcticnet.no)
Subject: Re: Newbie needs Help! Allegro + W95 :-(

> This may not have been in the *original* IBM VGA card, but according
> to my old book in programming for PC video subsystems, the EGA, the
> VGA, and the MCGA supports generating a Vertical Interrupt on IRQ2
> whenever vertical retrace starts, and explains how this is done. On
> the EGA/VGA, these interrupts appears to be controlled by the CRTC
> Vertical Retrace End register (CRTC register 11h) bits 4 and 5, though
> I haven't really studied this in detail.

The original true-blue IBM VGA only had a VSYNC interrupt on the PS/2
models 25 and 30 (ISA bus).  The models 50 and 60 (the ones with MCA
slots), had no vsync.

The all had the status bits for it, though.

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