From:	Guarionex Morales <morales AT buphyk DOT bu DOT edu>
Subject:	Memory mapped devices
To:	djgpp AT sun DOT soe DOT clarkson DOT edu
Date:	Thu, 12 May 1994 11:29:20 -0400 (EDT)

>
>>     - how can I write directly in the video ram (text mode) ?
>>     - how can I access to a specific PHYSICAL address (such as with
>>       Borland C peek and poke instructions
>
>See internal.doc for the mappings of the first MB of memory and VGA video
>memory in non-DPMI mode.  In DPMI mode you need to use far pointers, and gcc
>doesn't support these.  Starting with maintenance level 5, djgpp includes
>inline functions for emulating far pointers; look at farptr.h for details.
>
>As I enter this, I realize that I don't know how to obtain a selector which
>points at a physical address outside the first MB.  I suspect that there is a
>standard DPMI function call to do this, but is there a C routine which
>implements this call, and does go32 support this function?  This question has
>come up several times, usually in the context of a frame grabber or other
>hardware add-on which has memory which can be jumpered to appear at some high
>address.  The answer used to be that hacking go32 was required, but perhaps
>it is easier now.

Hello everyone,

	The memory mapped devices introduce yet another problem that I
have'nt seen mentioned in the list yet. For data integrity,
caching has to be disabled for the memory area where the device is
mapped onto.  For 386 systems without caching there is no problem, but
for 386 and  486 systems that do support caching, the
functionality of farpointers is not enough.  One solution (as was
pointed out to me by Mr. Babcock) is to turn off caching in CMOS and
take a big performance hit.  The second solution is to use the assembler
instruction that disables caching on the fly, before using memory mapped
devices, and enable caching once you are finished.  The permormance minded
solution (at least for the i486) is to set the bits that dissable
caching in the page descriptors of the memory mapped area.  The
advantage of the latter solution is that, only the memory area that
requires data integrity is precluded from being cached, and also every
time the whole cache is disabled on the fly, it is supposed to be
flushed.  My question is: is there a facility in djgpp or dpmi to set
the bits in the page descriptors that dissable caching?

						Thanks in advance.
						Guarionex Morales
						Physics PhD Candidate
						Department of Physics
						Boston University

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