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Mail Archives: djgpp/1993/05/26/11:58:41

Date: Wed, 26 May 93 11:49:07 EDT
From: engdahl AT brutus DOT aa DOT ab DOT com (Jon Engdahl)
To: djgpp AT sun DOT soe DOT clarkson DOT edu
Subject: Caching vs. shared RAMs on 486

On a 486, what happens when I read from a shared RAM, such as on an
Ethernet controller? My guess is that the ISA architecture and the 486
chip cooperate so that reads from 640K-1024K are not placed into either
the external mainboard cache or the internal 486 cache. Can somebody
confirm or deny this, or at least point me in the right direction?

Jonathan Engdahl, Sr. Project Engineer | engdahl AT aa DOT ab DOT com N8XVY 313-998-2450
Allen-Bradley Co.                      | A Rockwell International Company
555 Briarwood Circle,                  | Industrial Communication Networks
Ann Arbor, Michigan, 48108, USA        | system design, software, ASICs

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