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Mail Archives: djgpp-workers/2003/05/30/14:04:30

Date: Fri, 30 May 2003 13:05:33 -0500
From: Eric Rudd <rudd AT cyberoptics DOT com>
Subject: Re: uclock() still out by 1 in 65536
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Ben Peddell wrote:

> I'll have to try to investigate that. I'll see just what frequency the 
> RTC 1024Hz interrupt actually is.
>
> I know that the RTC is supposed to use a common 32768Hz crystal, and 
> the PIT is supposed to use 14318180Hz / 12 (=1193181.66Hz).

If you are concerned about small frequency errors, you may be interested 
in the origin of the 1.19-MHz rate that is used in the PC timer chip.  
In the early days of personal computing, it was considered important to 
maintain compatibility with NTSC, since people used NTSC monitors on 
their computers.  According to the EIA RS 170 A spec, the chroma 
subcarrier is at 3.579545 MHz +/- 10 Hz, and the PC clock was chosen to 
be 1/3 of that, or 1.19 MHz approximately.  The specified 3.579545 MHz 
rate itself is an approximation; it is exactly 455/2 times the 
horizontal sweep rate, which was originally 15750 Hz in the early 
black-and-white days, but was changed to 15750/1.001 when NTSC was 
devised.  Thus, the chroma subcarrier works out to 39.375/11 MHz, and 
the PC timer chip runs at 13.125/11 MHz.  As I recall, the system clock 
on the original IBM PC was 4 times that, or 4.77 MHz.

-Eric Rudd
rudd AT cyberoptics DOT com

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